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Diffstat (limited to 'src/soc/mediatek/mt8186/gpio.c')
-rw-r--r--src/soc/mediatek/mt8186/gpio.c60
1 files changed, 1 insertions, 59 deletions
diff --git a/src/soc/mediatek/mt8186/gpio.c b/src/soc/mediatek/mt8186/gpio.c
index c96f1ea2ac..59143461a7 100644
--- a/src/soc/mediatek/mt8186/gpio.c
+++ b/src/soc/mediatek/mt8186/gpio.c
@@ -223,7 +223,7 @@ static const struct gpio_drv_info gpio_driving_adv_info[GPIO_NUM] = {
[146] = { 0x20, 15, 3, },
};
-static void *gpio_find_reg_addr(gpio_t gpio)
+void *gpio_find_reg_addr(gpio_t gpio)
{
void *reg_addr;
switch (gpio.base & 0x0f) {
@@ -253,64 +253,6 @@ static void *gpio_find_reg_addr(gpio_t gpio)
return reg_addr;
}
-static void gpio_set_spec_pull_pupd(gpio_t gpio, enum pull_enable enable,
- enum pull_select select)
-{
- void *reg1;
- void *reg2;
- int bit = gpio.bit;
-
- reg1 = gpio_find_reg_addr(gpio) + gpio.offset;
- reg2 = reg1 + (gpio.base & 0xf0);
-
- if (enable == GPIO_PULL_ENABLE) {
- if (select == GPIO_PULL_DOWN)
- setbits32(reg1, BIT(bit));
- else
- clrbits32(reg1, BIT(bit));
- }
-
- if (enable == GPIO_PULL_ENABLE) {
- setbits32(reg2, 1 << bit);
- } else {
- clrbits32(reg2, 1 << bit);
- clrbits32(reg2 + 0x010, BIT(bit));
- }
-}
-
-static void gpio_set_pull_pu_pd(gpio_t gpio, enum pull_enable enable,
- enum pull_select select)
-{
- void *reg1;
- void *reg2;
- int bit = gpio.bit;
-
- reg1 = gpio_find_reg_addr(gpio) + gpio.offset;
- reg2 = reg1 - (gpio.base & 0xf0);
-
- if (enable == GPIO_PULL_ENABLE) {
- if (select == GPIO_PULL_DOWN) {
- clrbits32(reg1, BIT(bit));
- setbits32(reg2, BIT(bit));
- } else {
- clrbits32(reg2, BIT(bit));
- setbits32(reg1, BIT(bit));
- }
- } else {
- clrbits32(reg1, BIT(bit));
- clrbits32(reg2, BIT(bit));
- }
-}
-
-void gpio_set_pull(gpio_t gpio, enum pull_enable enable,
- enum pull_select select)
-{
- if (gpio.flag)
- gpio_set_spec_pull_pupd(gpio, enable, select);
- else
- gpio_set_pull_pu_pd(gpio, enable, select);
-}
-
static inline bool is_valid_drv(uint8_t drv)
{
return drv <= GPIO_DRV_16_MA;