summaryrefslogtreecommitdiff
path: root/src/soc/mediatek/mt8183/rtc.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/mediatek/mt8183/rtc.c')
-rw-r--r--src/soc/mediatek/mt8183/rtc.c13
1 files changed, 10 insertions, 3 deletions
diff --git a/src/soc/mediatek/mt8183/rtc.c b/src/soc/mediatek/mt8183/rtc.c
index f8d81f8c39..19b717cc82 100644
--- a/src/soc/mediatek/mt8183/rtc.c
+++ b/src/soc/mediatek/mt8183/rtc.c
@@ -411,10 +411,9 @@ static void dcxo_init(void)
rtc_write(PMIC_RG_DCXO_CW16, 0x9855);
/* 26M enable control */
- /* Enable clock buffer XO_SOC */
- rtc_write(PMIC_RG_DCXO_CW00, 0x4005);
+ /* Enable clock buffer XO_SOC, XO_CEL */
+ rtc_write(PMIC_RG_DCXO_CW00, 0x4805);
rtc_write(PMIC_RG_DCXO_CW11, 0x8000);
- rtc_write(PMIC_RG_DCXO_CW23, 0x0053);
/* Load thermal coefficient */
rtc_write(PMIC_RG_TOP_TMA_KEY, 0x9CA7);
@@ -432,6 +431,14 @@ static void dcxo_init(void)
mdelay(5);
}
+void mt6358_dcxo_disable_unused(void)
+{
+ /* Disable clock buffer XO_CEL */
+ rtc_write(PMIC_RG_DCXO_CW00_CLR, 0x0800);
+ /* Mask bblpm */
+ rtc_write(PMIC_RG_DCXO_CW23, 0x0053);
+}
+
/* the rtc boot flow entry */
void rtc_boot(void)
{