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Diffstat (limited to 'src/soc/mediatek/mt8183/md_ctrl.c')
-rw-r--r--src/soc/mediatek/mt8183/md_ctrl.c37
1 files changed, 37 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8183/md_ctrl.c b/src/soc/mediatek/mt8183/md_ctrl.c
new file mode 100644
index 0000000000..aa97756db2
--- /dev/null
+++ b/src/soc/mediatek/mt8183/md_ctrl.c
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2019 MediaTek Inc.
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <device/mmio.h>
+#include <soc/addressmap.h>
+#include <soc/infracfg.h>
+#include <soc/pll.h>
+#include <soc/md_ctrl.h>
+
+#define TOPCKGEN_CLK_MODE_MD_32K (1 << 8)
+#define TOPCKGEN_CLK_MODE_MD_26M (1 << 9)
+#define INFRA_MISC2_SRCCLKENA_RELEASE (0xFF)
+
+static void internal_md_power_down(void)
+{
+ /* Gating MD clock */
+ setbits_le32(&mtk_topckgen->clk_mode,
+ TOPCKGEN_CLK_MODE_MD_32K | TOPCKGEN_CLK_MODE_MD_26M);
+ /* Release SRCCLKENA */
+ clrbits_le32(&mt8183_infracfg->infra_misc2,
+ INFRA_MISC2_SRCCLKENA_RELEASE);
+}
+
+void mtk_md_early_init(void)
+{
+ internal_md_power_down();
+}