2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/mediatek/mt8173/include/soc/pll.h b/src/soc/mediatek/mt8173/include/soc/pll.h
index 4106d2a924..480ffbfb2d 100644
--- a/src/soc/mediatek/mt8173/include/soc/pll.h
+++ b/src/soc/mediatek/mt8173/include/soc/pll.h
@@ -292,7 +292,6 @@ enum {
 void mt_pll_post_init(void);
 void mt_pll_set_aud_div(u32 rate);
 void mt_pll_enable_ssusb_clk(void);
-void mt_pll_raise_ca53_freq(u32 freq);
 void mt_mem_pll_set_clk_cfg(void);
 void mt_mem_pll_config_pre(const struct mt8173_sdram_params *sdram_params);
 void mt_mem_pll_config_post(void);
diff --git a/src/soc/mediatek/mt8173/pll.c b/src/soc/mediatek/mt8173/pll.c
index c59fa3f528..7eb12b1282 100644
--- a/src/soc/mediatek/mt8173/pll.c
+++ b/src/soc/mediatek/mt8173/pll.c
@@ -432,7 +432,8 @@ void mt_pll_set_aud_div(u32 rate)
 	}
 }
 
-void mt_pll_raise_ca53_freq(u32 freq) {
+void mt_pll_raise_ca53_freq(u32 freq)
+{
 	pll_set_rate(&plls[APMIXED_ARMCA7PLL], freq); /* freq in Hz */
 }