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Diffstat (limited to 'src/soc/mediatek/mt8173')
-rw-r--r--src/soc/mediatek/mt8173/gpio.c58
-rw-r--r--src/soc/mediatek/mt8173/include/soc/gpio.h58
-rw-r--r--src/soc/mediatek/mt8173/include/soc/gpio_base.h24
3 files changed, 24 insertions, 116 deletions
diff --git a/src/soc/mediatek/mt8173/gpio.c b/src/soc/mediatek/mt8173/gpio.c
index 518df851f1..259ac53fbf 100644
--- a/src/soc/mediatek/mt8173/gpio.c
+++ b/src/soc/mediatek/mt8173/gpio.c
@@ -19,7 +19,6 @@
enum {
MAX_GPIO_NUMBER = 134,
- MAX_EINT_REG_BITS = 32,
};
static void pos_bit_calc(gpio_t gpio, u32 *pos, u32 *bit)
@@ -28,12 +27,6 @@ static void pos_bit_calc(gpio_t gpio, u32 *pos, u32 *bit)
*bit = gpio.id % MAX_GPIO_REG_BITS;
}
-static void pos_bit_calc_for_eint(gpio_t gpio, u32 *pos, u32 *bit)
-{
- *pos = gpio.id / MAX_EINT_REG_BITS;
- *bit = gpio.id % MAX_EINT_REG_BITS;
-}
-
void gpio_set_pull(gpio_t gpio, enum pull_enable enable,
enum pull_select select)
{
@@ -63,54 +56,3 @@ void gpio_set_pull(gpio_t gpio, enum pull_enable enable,
}
write16(en_reg, 1L << bit);
}
-
-int gpio_eint_poll(gpio_t gpio)
-{
- u32 pos;
- u32 bit;
- u32 status;
-
- pos_bit_calc_for_eint(gpio, &pos, &bit);
-
- status = (read32(&mt8173_eint->sta.regs[pos]) >> bit) & 0x1;
-
- if (status)
- write32(&mt8173_eint->ack.regs[pos], 1 << bit);
-
- return status;
-}
-
-void gpio_eint_configure(gpio_t gpio, enum gpio_irq_type type)
-{
- u32 pos;
- u32 bit, mask;
-
- pos_bit_calc_for_eint(gpio, &pos, &bit);
- mask = 1 << bit;
-
- /* Make it an input first. */
- gpio_input_pullup(gpio);
-
- write32(&mt8173_eint->d0en[pos], mask);
-
- switch (type) {
- case IRQ_TYPE_EDGE_FALLING:
- write32(&mt8173_eint->sens_clr.regs[pos], mask);
- write32(&mt8173_eint->pol_clr.regs[pos], mask);
- break;
- case IRQ_TYPE_EDGE_RISING:
- write32(&mt8173_eint->sens_clr.regs[pos], mask);
- write32(&mt8173_eint->pol_set.regs[pos], mask);
- break;
- case IRQ_TYPE_LEVEL_LOW:
- write32(&mt8173_eint->sens_set.regs[pos], mask);
- write32(&mt8173_eint->pol_clr.regs[pos], mask);
- break;
- case IRQ_TYPE_LEVEL_HIGH:
- write32(&mt8173_eint->sens_set.regs[pos], mask);
- write32(&mt8173_eint->pol_set.regs[pos], mask);
- break;
- }
-
- write32(&mt8173_eint->mask_clr.regs[pos], mask);
-}
diff --git a/src/soc/mediatek/mt8173/include/soc/gpio.h b/src/soc/mediatek/mt8173/include/soc/gpio.h
index a78c8b4fa0..ec0833408e 100644
--- a/src/soc/mediatek/mt8173/include/soc/gpio.h
+++ b/src/soc/mediatek/mt8173/include/soc/gpio.h
@@ -31,10 +31,6 @@ enum external_power {
GPIO_EINT_1P8V = 1,
};
-typedef struct {
- u32 id;
-} gpio_t;
-
#define PIN(id, name, func1, func2, func3, func4, func5, func6, func7) \
PAD_##name##_ID = id, \
PAD_##name##_FUNC_##func1 = 1, \
@@ -364,60 +360,6 @@ check_member(gpio_regs, hsic_ctrl[3], 0xe50);
static struct gpio_regs *const mtk_gpio = (void *)(GPIO_BASE);
-void gpio_set_pull(gpio_t gpio, enum pull_enable enable,
- enum pull_select select);
-void gpio_set_mode(gpio_t gpio, int mode);
void gpio_init(enum external_power);
-enum gpio_irq_type {
- IRQ_TYPE_EDGE_RISING,
- IRQ_TYPE_EDGE_FALLING,
- IRQ_TYPE_LEVEL_HIGH,
- IRQ_TYPE_LEVEL_LOW,
-};
-
-struct eint_section {
- uint32_t regs[7];
- uint32_t align1[9];
-};
-
-struct eint_regs {
- struct eint_section sta;
- struct eint_section ack;
- struct eint_section mask;
- struct eint_section mask_set;
- struct eint_section mask_clr;
- struct eint_section sens;
- struct eint_section sens_set;
- struct eint_section sens_clr;
- struct eint_section soft;
- struct eint_section soft_set;
- struct eint_section soft_clr;
- struct eint_section rsv00;
- struct eint_section pol;
- struct eint_section pol_set;
- struct eint_section pol_clr;
- struct eint_section rsv01;
- uint32_t d0en[7];
- uint32_t rsv02;
- uint32_t d1en[7];
-};
-
-check_member(eint_regs, d1en, 0x420);
-
-static struct eint_regs *const mt8173_eint = (void *)(EINT_BASE);
-
-/*
- * Firmware never enables interrupts on this platform. This function
- * reads current EINT status and clears the pending interrupt.
- *
- * Returns 1 if the interrupt was pending, else 0.
- */
-int gpio_eint_poll(gpio_t gpio);
-
-/*
- * Configure a GPIO to handle external interrupts (EINT) of given irq type.
- */
-void gpio_eint_configure(gpio_t gpio, enum gpio_irq_type type);
-
#endif /* SOC_MEDIATEK_MT8173_GPIO_H */
diff --git a/src/soc/mediatek/mt8173/include/soc/gpio_base.h b/src/soc/mediatek/mt8173/include/soc/gpio_base.h
new file mode 100644
index 0000000000..ac7f46a017
--- /dev/null
+++ b/src/soc/mediatek/mt8173/include/soc/gpio_base.h
@@ -0,0 +1,24 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#ifndef SOC_MEDIATEK_MT8173_GPIO_BASE_H
+#define SOC_MEDIATEK_MT8173_GPIO_BASE_H
+
+#include <stdint.h>
+
+typedef struct {
+ u32 id;
+} gpio_t;
+
+#endif