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-rw-r--r--src/soc/mediatek/mt8173/pll.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/mediatek/mt8173/pll.c b/src/soc/mediatek/mt8173/pll.c
index 7133fde400..bbbb1f325c 100644
--- a/src/soc/mediatek/mt8173/pll.c
+++ b/src/soc/mediatek/mt8173/pll.c
@@ -347,7 +347,7 @@ void mt_pll_init(void)
* TOP CLKMUX -- DO NOT CHANGE WITHOUT ADJUSTING <soc/pll.h> CONSTANTS!
*************/
for (i = 0; i < ARRAY_SIZE(mux_sels); i++)
- mux_set_sel(&muxes[mux_sels[i].id], mux_sels[i].sel);
+ pll_mux_set_sel(&muxes[mux_sels[i].id], mux_sels[i].sel);
/* enable scpsys clock off control */
write32(&mtk_topckgen->clk_scp_cfg_0,
@@ -445,5 +445,5 @@ void mt_mem_pll_config_post(void)
void mt_mem_pll_mux(void)
{
/* CLK_CFG_0 */
- mux_set_sel(&muxes[TOP_MEM_SEL], 1); /* 1: dmpll_ck */
+ pll_mux_set_sel(&muxes[TOP_MEM_SEL], 1); /* 1: dmpll_ck */
}