aboutsummaryrefslogtreecommitdiff
path: root/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/mediatek/mt8173/dramc_pi_calibration_api.c')
-rw-r--r--src/soc/mediatek/mt8173/dramc_pi_calibration_api.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c b/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c
index fa69f2e4c2..0c68ad9103 100644
--- a/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c
+++ b/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c
@@ -769,7 +769,7 @@ void tx_delay_for_wrleveling(u32 channel,
index = i / DQS_BIT_NUMBER;
if (i % DQS_BIT_NUMBER == 0)
- dramc_dbg_msg("DQS%d: %d \n", index,
+ dramc_dbg_msg("DQS%d: %d\n", index,
wrlevel_dqs_dly[channel][index]);
if (max_dqsdly_byte[index] <= wrlevel_dqs_dly[channel][index]) {