diff options
Diffstat (limited to 'src/soc/mediatek/common')
-rw-r--r-- | src/soc/mediatek/common/dpm_v2.c | 45 | ||||
-rw-r--r-- | src/soc/mediatek/common/include/soc/dpm_v2.h | 22 |
2 files changed, 67 insertions, 0 deletions
diff --git a/src/soc/mediatek/common/dpm_v2.c b/src/soc/mediatek/common/dpm_v2.c new file mode 100644 index 0000000000..b0f0dbcb88 --- /dev/null +++ b/src/soc/mediatek/common/dpm_v2.c @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <device/mmio.h> +#include <soc/dpm_v2.h> +#include <soc/mcu_common.h> +#include <soc/symbols.h> + +static struct mtk_mcu dpm_mcu[] = { + { + .firmware_name = CONFIG_DPM_DM_FIRMWARE, + .run_address = (void *)DPM_DM_SRAM_BASE, + }, + { + .firmware_name = CONFIG_DPM_PM_FIRMWARE, + .run_address = (void *)DPM_PM_SRAM_BASE, + .reset = dpm_reset, + }, +}; + +void dpm_reset(struct mtk_mcu *mcu) +{ + /* free RST */ + setbits32p(DPM_CFG_CH0 + DPM_RST_OFFSET, DPM_SW_RSTN); +} + +int dpm_init(void) +{ + int i; + struct mtk_mcu *dpm; + u32 dramc_wbr_backup = read32p(DRAMC_WBR); + + setbits32p(DRAMC_WBR, ENABLE_DRAMC_WBR_MASK); + + for (i = 0; i < ARRAY_SIZE(dpm_mcu); i++) { + dpm = &dpm_mcu[i]; + dpm->load_buffer = _dram_dma; + dpm->buffer_size = REGION_SIZE(dram_dma); + if (mtk_init_mcu(dpm)) + return -1; + } + + write32p(DRAMC_WBR, dramc_wbr_backup); + + return 0; +} diff --git a/src/soc/mediatek/common/include/soc/dpm_v2.h b/src/soc/mediatek/common/include/soc/dpm_v2.h new file mode 100644 index 0000000000..c11a9bb2da --- /dev/null +++ b/src/soc/mediatek/common/include/soc/dpm_v2.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __SOC_MEDIATEK_COMMON_DPM_V2_H__ +#define __SOC_MEDIATEK_COMMON_DPM_V2_H__ + +#include <soc/addressmap.h> +#include <soc/mcu_common.h> + +#define DPM_RST_OFFSET 0x7074 +#define DPM_SW_RSTN BIT(0) + +#define DPM_CFG_CH0 DPM_CFG_BASE +#define DPM_BARGS_CH0_REG0 (DPM_CFG_BASE + 0x6004) +#define DPM_BARGS_CH0_REG1 (DPM_CFG_BASE + 0x6008) +#define DRAMC_WBR (INFRACFG_AO_BASE + 0x0b4) + +#define ENABLE_DRAMC_WBR_MASK 0x2ffff + +void dpm_reset(struct mtk_mcu *mcu); +int dpm_init(void); + +#endif /* __SOC_MEDIATEK_COMMON_DPM_V2_H__ */ |