diff options
Diffstat (limited to 'src/soc/mediatek/common/spi.c')
| -rw-r--r-- | src/soc/mediatek/common/spi.c | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/src/soc/mediatek/common/spi.c b/src/soc/mediatek/common/spi.c index 2a668fe349..9271d6e6dc 100644 --- a/src/soc/mediatek/common/spi.c +++ b/src/soc/mediatek/common/spi.c @@ -50,8 +50,8 @@ static inline struct mtk_spi_bus *to_mtk_spi(const struct spi_slave *slave) static void spi_sw_reset(struct mtk_spi_regs *regs) { - setbits_le32(®s->spi_cmd_reg, SPI_CMD_RST_EN); - clrbits_le32(®s->spi_cmd_reg, SPI_CMD_RST_EN); + setbits32(®s->spi_cmd_reg, SPI_CMD_RST_EN); + clrbits32(®s->spi_cmd_reg, SPI_CMD_RST_EN); } void mtk_spi_init(unsigned int bus, enum spi_pad_mask pad_select, @@ -77,17 +77,17 @@ void mtk_spi_init(unsigned int bus, enum spi_pad_mask pad_select, mtk_spi_set_timing(regs, sck_ticks, cs_ticks, tick_dly); - clrsetbits_le32(®s->spi_cmd_reg, - (SPI_CMD_CPHA_EN | SPI_CMD_CPOL_EN | - SPI_CMD_TX_ENDIAN_EN | SPI_CMD_RX_ENDIAN_EN | - SPI_CMD_TX_DMA_EN | SPI_CMD_RX_DMA_EN | - SPI_CMD_PAUSE_EN | SPI_CMD_DEASSERT_EN), - (SPI_CMD_TXMSBF_EN | SPI_CMD_RXMSBF_EN | - SPI_CMD_FINISH_IE_EN | SPI_CMD_PAUSE_IE_EN)); + clrsetbits32(®s->spi_cmd_reg, + (SPI_CMD_CPHA_EN | SPI_CMD_CPOL_EN | + SPI_CMD_TX_ENDIAN_EN | SPI_CMD_RX_ENDIAN_EN | + SPI_CMD_TX_DMA_EN | SPI_CMD_RX_DMA_EN | + SPI_CMD_PAUSE_EN | SPI_CMD_DEASSERT_EN), + (SPI_CMD_TXMSBF_EN | SPI_CMD_RXMSBF_EN | + SPI_CMD_FINISH_IE_EN | SPI_CMD_PAUSE_IE_EN)); mtk_spi_set_gpio_pinmux(bus, pad_select); - clrsetbits_le32(®s->spi_pad_macro_sel_reg, SPI_PAD_SEL_MASK, + clrsetbits32(®s->spi_pad_macro_sel_reg, SPI_PAD_SEL_MASK, pad_select); gpio_output(slave->cs_gpio, 1); @@ -110,7 +110,7 @@ static int spi_ctrlr_claim_bus(const struct spi_slave *slave) struct mtk_spi_bus *mtk_slave = to_mtk_spi(slave); struct mtk_spi_regs *regs = mtk_slave->regs; - setbits_le32(®s->spi_cmd_reg, 1 << SPI_CMD_PAUSE_EN_SHIFT); + setbits32(®s->spi_cmd_reg, 1 << SPI_CMD_PAUSE_EN_SHIFT); mtk_slave->state = MTK_SPI_IDLE; gpio_output(mtk_slave->cs_gpio, 0); @@ -135,10 +135,10 @@ static int do_transfer(const struct spi_slave *slave, void *in, const void *out, else size = MIN(*bytes_in, *bytes_out); - clrsetbits_le32(®s->spi_cfg1_reg, - SPI_CFG1_PACKET_LENGTH_MASK | SPI_CFG1_PACKET_LOOP_MASK, - ((size - 1) << SPI_CFG1_PACKET_LENGTH_SHIFT) | - (0 << SPI_CFG1_PACKET_LOOP_SHIFT)); + clrsetbits32(®s->spi_cfg1_reg, + SPI_CFG1_PACKET_LENGTH_MASK | SPI_CFG1_PACKET_LOOP_MASK, + ((size - 1) << SPI_CFG1_PACKET_LENGTH_SHIFT) | + (0 << SPI_CFG1_PACKET_LOOP_SHIFT)); if (*bytes_out) { const uint8_t *outb = (const uint8_t *)out; @@ -166,10 +166,10 @@ static int do_transfer(const struct spi_slave *slave, void *in, const void *out, } if (mtk_slave->state == MTK_SPI_IDLE) { - setbits_le32(®s->spi_cmd_reg, SPI_CMD_ACT_EN); + setbits32(®s->spi_cmd_reg, SPI_CMD_ACT_EN); mtk_slave->state = MTK_SPI_PAUSE_IDLE; } else if (mtk_slave->state == MTK_SPI_PAUSE_IDLE) { - setbits_le32(®s->spi_cmd_reg, SPI_CMD_RESUME_EN); + setbits32(®s->spi_cmd_reg, SPI_CMD_RESUME_EN); } stopwatch_init_usecs_expire(&sw, MTK_TXRX_TIMEOUT_US); @@ -246,7 +246,7 @@ static void spi_ctrlr_release_bus(const struct spi_slave *slave) struct mtk_spi_bus *mtk_slave = to_mtk_spi(slave); struct mtk_spi_regs *regs = mtk_slave->regs; - clrbits_le32(®s->spi_cmd_reg, SPI_CMD_PAUSE_EN); + clrbits32(®s->spi_cmd_reg, SPI_CMD_PAUSE_EN); spi_sw_reset(regs); mtk_slave->state = MTK_SPI_IDLE; |