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Diffstat (limited to 'src/soc/mediatek/common/dpm.c')
-rw-r--r--src/soc/mediatek/common/dpm.c33
1 files changed, 22 insertions, 11 deletions
diff --git a/src/soc/mediatek/common/dpm.c b/src/soc/mediatek/common/dpm.c
index 991441e74c..0bcf409399 100644
--- a/src/soc/mediatek/common/dpm.c
+++ b/src/soc/mediatek/common/dpm.c
@@ -5,16 +5,6 @@
#include <soc/mcu_common.h>
#include <soc/symbols.h>
-static void reset_dpm(struct mtk_mcu *mcu)
-{
- /* write bootargs */
- write32(&mtk_dpm->twam_window_len, 0x0);
- write32(&mtk_dpm->twam_mon_type, 0x0);
-
- /* free RST */
- setbits32(&mtk_dpm->sw_rstn, DPM_SW_RSTN_RESET);
-}
-
static struct mtk_mcu dpm_mcu[] = {
{
.firmware_name = CONFIG_DPM_DM_FIRMWARE,
@@ -23,15 +13,32 @@ static struct mtk_mcu dpm_mcu[] = {
{
.firmware_name = CONFIG_DPM_PM_FIRMWARE,
.run_address = (void *)DPM_PM_SRAM_BASE,
- .reset = reset_dpm,
+ .priv = mtk_dpm,
+ .reset = dpm_reset,
},
};
+void dpm_reset(struct mtk_mcu *mcu)
+{
+ struct dpm_regs *dpm = mcu->priv;
+
+ /* write bootargs */
+ write32(&dpm->twam_window_len, 0x0);
+ write32(&dpm->twam_mon_type, 0x0);
+
+ /* free RST */
+ setbits32(&dpm->sw_rstn, DPM_SW_RSTN_RESET);
+}
+
int dpm_init(void)
{
int i;
struct mtk_mcu *dpm;
+ if (CONFIG(DPM_FOUR_CHANNEL))
+ if (dpm_4ch_init())
+ return -1;
+
/* config DPM SRAM layout */
clrsetbits32(&mtk_dpm->sw_rstn, DPM_MEM_RATIO_MASK, DPM_MEM_RATIO_CFG1);
@@ -43,5 +50,9 @@ int dpm_init(void)
return -1;
}
+ if (CONFIG(DPM_FOUR_CHANNEL))
+ if (dpm_4ch_para_setting())
+ return -1;
+
return 0;
}