diff options
Diffstat (limited to 'src/soc/marvell/bg4cd/romstage.S')
| -rw-r--r-- | src/soc/marvell/bg4cd/romstage.S | 79 |
1 files changed, 0 insertions, 79 deletions
diff --git a/src/soc/marvell/bg4cd/romstage.S b/src/soc/marvell/bg4cd/romstage.S deleted file mode 100644 index 73574f2bc4..0000000000 --- a/src/soc/marvell/bg4cd/romstage.S +++ /dev/null @@ -1,79 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2014 Google Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include <arch/asm.h> - -.arm -ENTRY(stage_entry) - /* - * Set the CPU to System mode with IRQ and FIQ disabled. Prefetch/Data - * aborts may happen early and crash before the abort handlers are - * installed, but at least the problem will show up near the code that - * causes it. - */ - msr cpsr_cxf, #0xdf - bl _thumb_start -ENDPROC(stage_entry) - -.thumb -ENTRY(_thumb_start) - bl arm_init_caches - - /* - * From Cortex-A Series Programmer's Guide: - * Only CPU 0 performs initialization. Other CPUs go into WFI - * to do this, first work out which CPU this is - * this code typically is run before any other initialization step - */ - mrc p15, 0, r1, c0, c0, 5 @ Read Multiprocessor Affinity Register - and r1, r1, #0x3 @ Extract CPU ID bits - cmp r1, #0 - bne wait_for_interrupt @ If this is not core0, wait - - /* - * Initialize the stack to a known value. This is used to check for - * stack overflow later in the boot process. - */ - ldr r0, =_stack - ldr r1, =_estack - ldr r2, =0xdeadbeef -init_stack_loop: - str r2, [r0] - add r0, #4 - cmp r0, r1 - bne init_stack_loop - - ldr sp, =_estack /* Set up stack pointer */ - bl main - -wait_for_interrupt: - wfi - mov pc, lr @ back to my caller -ENDPROC(_thumb_start) |