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-rw-r--r--src/soc/intel/cannonlake/Kconfig1
-rw-r--r--src/soc/intel/common/block/sata/Kconfig14
-rw-r--r--src/soc/intel/common/block/sata/Makefile.inc1
-rw-r--r--src/soc/intel/common/block/sata/sata.c102
-rw-r--r--src/soc/intel/common/pch/Kconfig1
-rw-r--r--src/soc/intel/icelake/Kconfig1
-rw-r--r--src/soc/intel/jasperlake/Kconfig1
-rw-r--r--src/soc/intel/tigerlake/Kconfig1
8 files changed, 0 insertions, 122 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index f06d84b87c..dfc90cd099 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -84,7 +84,6 @@ config CPU_SPECIFIC_OPTIONS
select PLATFORM_USES_FSP2_0
select REG_SCRIPT
select SMP
- select SOC_AHCI_PORT_IMPLEMENTED_INVERT
select PMC_GLOBAL_RESET_ENABLE_LOCK
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
diff --git a/src/soc/intel/common/block/sata/Kconfig b/src/soc/intel/common/block/sata/Kconfig
deleted file mode 100644
index 98ff6967c9..0000000000
--- a/src/soc/intel/common/block/sata/Kconfig
+++ /dev/null
@@ -1,14 +0,0 @@
-config SOC_INTEL_COMMON_BLOCK_SATA
- bool
- help
- Intel Processor common SATA support
-
-config SOC_AHCI_PORT_IMPLEMENTED_INVERT
- depends on SOC_INTEL_COMMON_BLOCK_SATA
- bool
- help
- SATA PCI configuration space offset 0x92 Port
- implement register bit 0-2 represents respective
- SATA port enable status as in 0 = Disable; 1 = Enable.
- If this option is selected then port enable status will be
- inverted as in 0 = Enable; 1 = Disable.
diff --git a/src/soc/intel/common/block/sata/Makefile.inc b/src/soc/intel/common/block/sata/Makefile.inc
deleted file mode 100644
index 623d1511e1..0000000000
--- a/src/soc/intel/common/block/sata/Makefile.inc
+++ /dev/null
@@ -1 +0,0 @@
-ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SATA) += sata.c
diff --git a/src/soc/intel/common/block/sata/sata.c b/src/soc/intel/common/block/sata/sata.c
deleted file mode 100644
index d3f82edbd3..0000000000
--- a/src/soc/intel/common/block/sata/sata.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <device/mmio.h>
-#include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_ops.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <soc/pci_devs.h>
-
-#define SATA_ABAR_PORT_IMPLEMENTED 0x0c
-#define SATA_PCI_CFG_PORT_CTL_STS 0x92
-
-static void *sata_get_ahci_bar(struct device *dev)
-{
- uintptr_t bar;
-
- bar = pci_read_config32(dev, PCI_BASE_ADDRESS_5);
- return (void *)(bar & ~PCI_BASE_ADDRESS_MEM_ATTR_MASK);
-}
-
-/*
- * SATA Port control and Status. By default, the SATA ports are set (by HW)
- * to the disabled state (e.g. bits[3:0] == '0') as a result of an initial
- * power on reset. When enabled by software as per SATA port mapping,
- * the ports can transition between the on, partial and slumber states
- * and can detect devices. When disabled, the port is in the off state and
- * can't detect any devices.
- */
-static void sata_final(struct device *dev)
-{
- void *ahcibar = sata_get_ahci_bar(dev);
- u8 port_impl, temp;
-
- /* Set Bus Master */
- pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
-
- /* Read Ports Implemented (GHC_PI) */
- port_impl = read8(ahcibar + SATA_ABAR_PORT_IMPLEMENTED);
-
- if (CONFIG(SOC_AHCI_PORT_IMPLEMENTED_INVERT))
- port_impl = ~port_impl;
-
- port_impl &= 0x07; /* bit 0-2 */
-
- /* Port enable */
- temp = pci_read_config8(dev, SATA_PCI_CFG_PORT_CTL_STS);
- temp |= port_impl;
- pci_write_config8(dev, SATA_PCI_CFG_PORT_CTL_STS, temp);
-}
-
-static struct device_operations sata_ops = {
- .read_resources = pci_dev_read_resources,
- .set_resources = pci_dev_set_resources,
- .enable_resources = pci_dev_enable_resources,
- .final = sata_final,
- .ops_pci = &pci_dev_ops_pci,
-};
-
-static const unsigned short pci_device_ids[] = {
- PCI_DEVICE_ID_INTEL_SPT_U_SATA,
- PCI_DEVICE_ID_INTEL_SPT_U_Y_PREMIUM_SATA,
- PCI_DEVICE_ID_INTEL_SPT_KBL_SATA,
- PCI_DEVICE_ID_INTEL_LWB_SATA_AHCI,
- PCI_DEVICE_ID_INTEL_LWB_SSATA_AHCI,
- PCI_DEVICE_ID_INTEL_LWB_SATA_RAID,
- PCI_DEVICE_ID_INTEL_LWB_SSATA_RAID,
- PCI_DEVICE_ID_INTEL_LWB_SATA_AHCI_SUPER,
- PCI_DEVICE_ID_INTEL_LWB_SSATA_AHCI_SUPER,
- PCI_DEVICE_ID_INTEL_LWB_SATA_RAID_SUPER,
- PCI_DEVICE_ID_INTEL_LWB_SSATA_RAID_SUPER,
- PCI_DEVICE_ID_INTEL_LWB_SATA_ALT,
- PCI_DEVICE_ID_INTEL_LWB_SATA_ALT_RST,
- PCI_DEVICE_ID_INTEL_LWB_SSATA_ALT,
- PCI_DEVICE_ID_INTEL_LWB_SSATA_ALT_RST,
- PCI_DEVICE_ID_INTEL_CNL_SATA,
- PCI_DEVICE_ID_INTEL_CNL_PREMIUM_SATA,
- PCI_DEVICE_ID_INTEL_CNP_CMP_COMPAT_SATA,
- PCI_DEVICE_ID_INTEL_CNP_H_SATA,
- PCI_DEVICE_ID_INTEL_CNP_LP_SATA,
- PCI_DEVICE_ID_INTEL_ICP_U_SATA,
- PCI_DEVICE_ID_INTEL_CMP_SATA,
- PCI_DEVICE_ID_INTEL_CMP_PREMIUM_SATA,
- PCI_DEVICE_ID_INTEL_CMP_LP_SATA,
- PCI_DEVICE_ID_INTEL_CMP_H_SATA,
- PCI_DEVICE_ID_INTEL_CMP_H_HALO_SATA,
- PCI_DEVICE_ID_INTEL_CMP_H_PREMIUM_SATA,
- PCI_DEVICE_ID_INTEL_TGP_LP_SATA,
- PCI_DEVICE_ID_INTEL_TGP_SATA,
- PCI_DEVICE_ID_INTEL_TGP_PREMIUM_SATA,
- PCI_DEVICE_ID_INTEL_TGP_COMPAT_SATA,
- PCI_DEVICE_ID_INTEL_MCC_AHCI_SATA,
- PCI_DEVICE_ID_INTEL_JSP_SATA_1,
- PCI_DEVICE_ID_INTEL_JSP_SATA_2,
- 0
-};
-
-static const struct pci_driver pch_sata __pci_driver = {
- .ops = &sata_ops,
- .vendor = PCI_VENDOR_ID_INTEL,
- .devices = pci_device_ids,
-};
diff --git a/src/soc/intel/common/pch/Kconfig b/src/soc/intel/common/pch/Kconfig
index cca65d6b2a..6e7f2f6c75 100644
--- a/src/soc/intel/common/pch/Kconfig
+++ b/src/soc/intel/common/pch/Kconfig
@@ -32,7 +32,6 @@ config PCH_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_PCR
select SOC_INTEL_COMMON_BLOCK_PMC
select SOC_INTEL_COMMON_BLOCK_RTC
- select SOC_INTEL_COMMON_BLOCK_SATA
select SOC_INTEL_COMMON_BLOCK_SMBUS
select SOC_INTEL_COMMON_BLOCK_SPI
select SOC_INTEL_COMMON_BLOCK_TCO
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index 2a5156b2b9..52092bac0e 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -34,7 +34,6 @@ config CPU_SPECIFIC_OPTIONS
select PLATFORM_USES_FSP2_1
select REG_SCRIPT
select SMP
- select SOC_AHCI_PORT_IMPLEMENTED_INVERT
select PMC_GLOBAL_RESET_ENABLE_LOCK
select CPU_INTEL_COMMON_SMM
select SOC_INTEL_COMMON
diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
index bfefbf271b..21dba0eb9a 100644
--- a/src/soc/intel/jasperlake/Kconfig
+++ b/src/soc/intel/jasperlake/Kconfig
@@ -35,7 +35,6 @@ config CPU_SPECIFIC_OPTIONS
select PLATFORM_USES_FSP2_1
select REG_SCRIPT
select SMP
- select SOC_AHCI_PORT_IMPLEMENTED_INVERT
select PMC_GLOBAL_RESET_ENABLE_LOCK
select CPU_INTEL_COMMON_SMM
select SOC_INTEL_COMMON
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
index e0d29fbeef..fbf56b46a9 100644
--- a/src/soc/intel/tigerlake/Kconfig
+++ b/src/soc/intel/tigerlake/Kconfig
@@ -34,7 +34,6 @@ config CPU_SPECIFIC_OPTIONS
select PLATFORM_USES_FSP2_1
select REG_SCRIPT
select SMP
- select SOC_AHCI_PORT_IMPLEMENTED_INVERT
select PMC_GLOBAL_RESET_ENABLE_LOCK
select CPU_INTEL_COMMON_SMM
select SOC_INTEL_COMMON