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-rw-r--r--src/soc/intel/apollolake/chip.c2
-rw-r--r--src/soc/intel/apollolake/chip.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index a29ba3b19f..956a55b4a7 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -617,7 +617,7 @@ static void glk_fsp_silicon_init_params_cb(
/*
* Options to bump USB3 LDO voltage with 40mv.
*/
- silconfig->ModPhyVoltageBump = cfg->ModPhyVoltageBump;
+ silconfig->ModPhyVoltageBump = cfg->mod_phy_voltage_bump;
/*
* Options to adjust PMIC Vdd2 voltage.
diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h
index 26e4478da2..5a3aa880c5 100644
--- a/src/soc/intel/apollolake/chip.h
+++ b/src/soc/intel/apollolake/chip.h
@@ -196,7 +196,7 @@ struct soc_intel_apollolake_config {
* LDO voltage. Set TRUE to increase LDO voltage with 40mV.
* 0:FALSE (default), 1:True.
*/
- uint8_t ModPhyVoltageBump;
+ uint8_t mod_phy_voltage_bump;
/* Options to adjust PMIC Vdd2 voltage. Default is 0 to not adjusting
* the PMIC Vdd2 default voltage 1.20v. Upd for changing Vdd2 Voltage