summaryrefslogtreecommitdiff
path: root/src/soc/intel
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/meteorlake/chipset.cb6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/meteorlake/chipset.cb b/src/soc/intel/meteorlake/chipset.cb
index b98e4f35b3..1f68eff5e7 100644
--- a/src/soc/intel/meteorlake/chipset.cb
+++ b/src/soc/intel/meteorlake/chipset.cb
@@ -8,6 +8,12 @@ chip soc/intel/meteorlake
.tdp_pl4 = 114,
}"
+ register "power_limits_config[MTL_P_682_CORE]" = "{
+ .tdp_pl1_override = 28,
+ .tdp_pl2_override = 64,
+ .tdp_pl4 = 120,
+ }"
+
# NOTE: if any variant wants to override this value, use the same format
# as register "common_soc_config.pch_thermal_trip" = "value", instead of
# putting it under register "common_soc_config" in overridetree.cb file.