diff options
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/xeon_sp/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/spr/romstage.c | 29 |
2 files changed, 30 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig index 52aaec1797..923527e36c 100644 --- a/src/soc/intel/xeon_sp/Kconfig +++ b/src/soc/intel/xeon_sp/Kconfig @@ -89,6 +89,7 @@ config ECAM_MMCONF_BASE_ADDRESS default 0x80000000 config ECAM_MMCONF_BUS_NUMBER + default 512 if MAX_SOCKET = 4 default 256 config ALWAYS_ALLOW_ABOVE_4G_ALLOCATION diff --git a/src/soc/intel/xeon_sp/spr/romstage.c b/src/soc/intel/xeon_sp/spr/romstage.c index 4cce21f249..74976b362e 100644 --- a/src/soc/intel/xeon_sp/spr/romstage.c +++ b/src/soc/intel/xeon_sp/spr/romstage.c @@ -211,6 +211,35 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) m_cfg->mmiohBase = 0x2000; m_cfg->mmiohSize = 0x3; + /* + * By default FSP will set MMCFG size to 256 buses on 1S and 2S platforms + * and 512 buses on 4S platforms. 512 buses are implemented by using multiple + * PCI segment groups and is likely incompatible with legacy software stacks. + */ + switch (CONFIG_ECAM_MMCONF_BUS_NUMBER) { + case 2048: + m_cfg->mmCfgSize = 5; + break; + case 1024: + m_cfg->mmCfgSize = 4; + break; + case 512: + m_cfg->mmCfgSize = 3; + break; + case 256: + m_cfg->mmCfgSize = 2; + break; + case 128: + m_cfg->mmCfgSize = 1; + break; + case 64: + m_cfg->mmCfgSize = 0; + break; + default: + printk(BIOS_ERR, "%s: Unsupported ECAM_MMCONF_BUS_NUMBER = %d\n", + __func__, CONFIG_ECAM_MMCONF_BUS_NUMBER); + } + m_cfg->BoardTypeBitmask = 0x11111133; /* |