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-rw-r--r--src/soc/intel/cannonlake/Kconfig11
-rw-r--r--src/soc/intel/cannonlake/chip.h9
-rw-r--r--src/soc/intel/cannonlake/romstage/fsp_params.c5
3 files changed, 14 insertions, 11 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 40b40d65ad..6af05c8848 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -292,4 +292,15 @@ config FSP_FD_PATH
depends on FSP_USE_REPO
default "3rdparty/fsp/CoffeeLakeFspBinPkg/Fsp.fd" if SOC_INTEL_COFFEELAKE || SOC_INTEL_WHISKEYLAKE
+config SOC_INTEL_CANNONLAKE_DEBUG_CONSENT
+ int "Debug Consent for CNL"
+ # USB DBC is more common for developers so make this default to 3 if
+ # SOC_INTEL_DEBUG_CONSENT=y
+ default 3 if SOC_INTEL_DEBUG_CONSENT
+ default 0
+ help
+ This is to control debug interface on SOC.
+ Setting non-zero value will allow to use DBC or DCI to debug SOC.
+ PlatformDebugConsent in FspmUpd.h has the details.
+
endif
diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h
index 58b540cac0..9bba226e58 100644
--- a/src/soc/intel/cannonlake/chip.h
+++ b/src/soc/intel/cannonlake/chip.h
@@ -292,15 +292,6 @@ struct soc_intel_cannonlake_config {
*/
uint8_t PchPmSlpAMinAssert;
- /* Desired platform debug type. */
- enum {
- DebugConsent_Disabled,
- DebugConsent_DCI_DBC,
- DebugConsent_DCI,
- DebugConsent_USB3_DBC,
- DebugConsent_XDP, /* XDP/Mipi60 */
- DebugConsent_USB2_DBC,
- } DebugConsent;
/*
* SerialIO device mode selection:
*
diff --git a/src/soc/intel/cannonlake/romstage/fsp_params.c b/src/soc/intel/cannonlake/romstage/fsp_params.c
index 86160f68ae..ce5863855e 100644
--- a/src/soc/intel/cannonlake/romstage/fsp_params.c
+++ b/src/soc/intel/cannonlake/romstage/fsp_params.c
@@ -108,9 +108,10 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
m_cfg->SmbusEnable = 0;
else
m_cfg->SmbusEnable = smbus->enabled;
- /* Set debug probe type */
- m_cfg->PlatformDebugConsent = config->DebugConsent;
+ /* Set debug probe type */
+ m_cfg->PlatformDebugConsent =
+ CONFIG_SOC_INTEL_CANNONLAKE_DEBUG_CONSENT;
mainboard_memory_init_params(mupd);
}