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-rw-r--r--src/soc/intel/skylake/romstage/romstage.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c
index 56a5a92255..fda60875f2 100644
--- a/src/soc/intel/skylake/romstage/romstage.c
+++ b/src/soc/intel/skylake/romstage/romstage.c
@@ -45,6 +45,9 @@
/* SOC initialization before RAM is enabled */
void soc_pre_ram_init(struct romstage_params *params)
{
+ /* Program MCHBAR and DMIBAR */
+ systemagent_early_init();
+
/* Prepare to initialize memory */
soc_fill_pei_data(params->pei_data);
}