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-rw-r--r--src/soc/intel/icelake/bootblock/bootblock.c4
-rw-r--r--src/soc/intel/icelake/romstage/pch.c4
-rw-r--r--src/soc/intel/skylake/bootblock/bootblock.c4
-rw-r--r--src/soc/intel/skylake/romstage/pch.c4
4 files changed, 8 insertions, 8 deletions
diff --git a/src/soc/intel/icelake/bootblock/bootblock.c b/src/soc/intel/icelake/bootblock/bootblock.c
index 9f360daf00..df1fb56234 100644
--- a/src/soc/intel/icelake/bootblock/bootblock.c
+++ b/src/soc/intel/icelake/bootblock/bootblock.c
@@ -2,6 +2,7 @@
#include <bootblock_common.h>
#include <intelblocks/systemagent.h>
+#include <intelblocks/tco.h>
#include <intelblocks/uart.h>
#include <soc/bootblock.h>
@@ -25,4 +26,7 @@ void bootblock_soc_init(void)
{
report_platform_info();
bootblock_pch_init();
+
+ /* Program TCO_BASE_ADDRESS and TCO Timer Halt */
+ tco_configure();
}
diff --git a/src/soc/intel/icelake/romstage/pch.c b/src/soc/intel/icelake/romstage/pch.c
index 6b134c0681..d3c2554425 100644
--- a/src/soc/intel/icelake/romstage/pch.c
+++ b/src/soc/intel/icelake/romstage/pch.c
@@ -1,14 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <intelblocks/smbus.h>
-#include <intelblocks/tco.h>
#include <soc/romstage.h>
void romstage_pch_init(void)
{
- /* Programming TCO_BASE_ADDRESS and TCO Timer Halt */
- tco_configure();
-
/* Program SMBUS_BASE_ADDRESS and Enable it */
smbus_common_init();
}
diff --git a/src/soc/intel/skylake/bootblock/bootblock.c b/src/soc/intel/skylake/bootblock/bootblock.c
index 6380db2e1f..1e5f105274 100644
--- a/src/soc/intel/skylake/bootblock/bootblock.c
+++ b/src/soc/intel/skylake/bootblock/bootblock.c
@@ -3,6 +3,7 @@
#include <bootblock_common.h>
#include <intelblocks/systemagent.h>
#include <intelblocks/gspi.h>
+#include <intelblocks/tco.h>
#include <intelblocks/uart.h>
#include <soc/bootblock.h>
@@ -33,4 +34,7 @@ void bootblock_soc_init(void)
report_platform_info();
bootblock_pch_init();
gspi_early_bar_init();
+
+ /* Program TCO_BASE_ADDRESS and TCO Timer Halt */
+ tco_configure();
}
diff --git a/src/soc/intel/skylake/romstage/pch.c b/src/soc/intel/skylake/romstage/pch.c
index c85bdd667f..f94d611abe 100644
--- a/src/soc/intel/skylake/romstage/pch.c
+++ b/src/soc/intel/skylake/romstage/pch.c
@@ -1,14 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <intelblocks/smbus.h>
-#include <intelblocks/tco.h>
#include <soc/romstage.h>
void romstage_pch_init(void)
{
- /* Program TCO_BASE_ADDRESS and TCO Timer Halt */
- tco_configure();
-
/* Program SMBUS_BASE_ADDRESS and enable it */
smbus_common_init();
}