diff options
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/elkhartlake/chip.h | 3 | ||||
-rw-r--r-- | src/soc/intel/elkhartlake/romstage/fsp_params.c | 3 |
2 files changed, 1 insertions, 5 deletions
diff --git a/src/soc/intel/elkhartlake/chip.h b/src/soc/intel/elkhartlake/chip.h index 3e1d56e17e..8764657b19 100644 --- a/src/soc/intel/elkhartlake/chip.h +++ b/src/soc/intel/elkhartlake/chip.h @@ -227,9 +227,6 @@ struct soc_intel_elkhartlake_config { /* PCIe RP L1 substate */ enum L1_substates_control PcieRpL1Substates[CONFIG_MAX_ROOT_PORTS]; - /* SMBus */ - uint8_t SmbusEnable; - /* eMMC and SD */ uint8_t ScsEmmcHs400Enabled; uint8_t ScsEmmcDdr50Enabled; diff --git a/src/soc/intel/elkhartlake/romstage/fsp_params.c b/src/soc/intel/elkhartlake/romstage/fsp_params.c index b8aaca78db..5c8c995959 100644 --- a/src/soc/intel/elkhartlake/romstage/fsp_params.c +++ b/src/soc/intel/elkhartlake/romstage/fsp_params.c @@ -64,8 +64,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, m_cfg->PchMasterClockGating = 1; m_cfg->PchMasterPowerGating = 1; - /* Enable SMBus controller based on config */ - m_cfg->SmbusEnable = config->SmbusEnable; + m_cfg->SmbusEnable = is_devfn_enabled(PCH_DEVFN_SMBUS); /* Set debug probe type */ m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_ELKHARTLAKE_DEBUG_CONSENT; |