summaryrefslogtreecommitdiff
path: root/src/soc/intel
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/skylake/chip.c2
-rw-r--r--src/soc/intel/skylake/chip.h7
-rw-r--r--src/soc/intel/skylake/chip_fsp20.c2
3 files changed, 8 insertions, 3 deletions
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index 1e3fdc6fd2..9fe19d8f9b 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -171,7 +171,7 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params)
params->SerialIrqConfigStartFramePulse =
config->SerialIrqConfigStartFramePulse;
- params->SkipMpInit = config->FspSkipMpInit;
+ params->SkipMpInit = !config->use_fsp_mp_init;
for (i = 0; i < ARRAY_SIZE(config->i2c); i++)
params->SerialIoI2cVoltage[i] = config->i2c_voltage[i];
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index 2523554613..8b98662b1e 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -434,7 +434,12 @@ struct soc_intel_skylake_config {
SERIAL_IRQ_FRAME_PULSE_8CLK = 2,
} SerialIrqConfigStartFramePulse;
- u8 FspSkipMpInit;
+ /*
+ * Option for mainboard to skip coreboot MP initialization
+ * 0 = Make use of coreboot MP Init
+ * 1 = Make use of FSP MP Init
+ */
+ u8 use_fsp_mp_init;
/*
* VrConfig Settings for 5 domains
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
index 0ba70e08ab..227e244224 100644
--- a/src/soc/intel/skylake/chip_fsp20.c
+++ b/src/soc/intel/skylake/chip_fsp20.c
@@ -387,7 +387,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->PchSirqEnable = config->SerialIrqConfigSirqEnable;
params->PchSirqMode = config->SerialIrqConfigSirqMode;
- params->CpuConfig.Bits.SkipMpInit = config->FspSkipMpInit;
+ params->CpuConfig.Bits.SkipMpInit = !config->use_fsp_mp_init;
for (i = 0; i < ARRAY_SIZE(config->i2c); i++)
params->SerialIoI2cVoltage[i] = config->i2c_voltage[i];