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-rw-r--r--src/soc/intel/alderlake/Kconfig1
-rw-r--r--src/soc/intel/alderlake/romstage/romstage.c8
2 files changed, 9 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 1b2f6953ef..132e812dfa 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -73,6 +73,7 @@ config CPU_SPECIFIC_OPTIONS
select INTEL_GMA_ACPI
select INTEL_GMA_ADD_VBT if RUN_FSP_GOP
select INTEL_GMA_OPREGION_2_1
+ select INTEL_TXT_LIB
select MRC_SETTINGS_PROTECT
select PARALLEL_MP_AP_WORK
select PLATFORM_USES_FSP2_2
diff --git a/src/soc/intel/alderlake/romstage/romstage.c b/src/soc/intel/alderlake/romstage/romstage.c
index 3ee83bdb13..b30580662c 100644
--- a/src/soc/intel/alderlake/romstage/romstage.c
+++ b/src/soc/intel/alderlake/romstage/romstage.c
@@ -19,6 +19,7 @@
#include <cpu/intel/cpu_ids.h>
#include <timestamp.h>
#include <string.h>
+#include <security/intel/txt/txt.h>
#define FSP_SMBIOS_MEMORY_INFO_GUID \
{ \
@@ -135,6 +136,13 @@ void mainboard_romstage_entry(void)
smbus_common_init();
/* Initialize HECI interface */
cse_init(HECI1_BASE_ADDRESS);
+ /*
+ * Disable Intel TXT if `CPU is unsupported` or `SoC haven't selected the config`.
+ *
+ * It would help to access VGA framebuffer prior calling into FSP-M.
+ */
+ if (!CONFIG(INTEL_TXT))
+ disable_intel_txt();
if (CONFIG(SOC_INTEL_COMMON_BASECODE_DEBUG_FEATURE))
dbg_feature_cntrl_init();