diff options
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/alderlake/romstage/fsp_params.c | 1 | ||||
-rw-r--r-- | src/soc/intel/common/block/cpu/cpulib.c | 10 | ||||
-rw-r--r-- | src/soc/intel/common/block/include/intelblocks/cpulib.h | 8 | ||||
-rw-r--r-- | src/soc/intel/meteorlake/romstage/fsp_params.c | 1 | ||||
-rw-r--r-- | src/soc/intel/tigerlake/romstage/fsp_params.c | 1 |
5 files changed, 3 insertions, 18 deletions
diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c index 4fc4099734..84f83e3bbe 100644 --- a/src/soc/intel/alderlake/romstage/fsp_params.c +++ b/src/soc/intel/alderlake/romstage/fsp_params.c @@ -3,6 +3,7 @@ #include <assert.h> #include <console/console.h> #include <cpu/x86/msr.h> +#include <cpu/intel/common/common.h> #include <cpu/intel/cpu_ids.h> #include <device/device.h> #include <drivers/wifi/generic/wifi.h> diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c index c317e05854..bf361a4791 100644 --- a/src/soc/intel/common/block/cpu/cpulib.c +++ b/src/soc/intel/common/block/cpu/cpulib.c @@ -19,7 +19,6 @@ #define CPUID_HYBRID_INFORMATION 0x1a /* Structured Extended Feature Flags */ -#define CPUID_STRUCT_EXTENDED_FEATURE_FLAGS 0x7 #define HYBRID_FEATURE BIT(15) /* @@ -485,15 +484,6 @@ void init_core_prmrr(void) sync_core_prmrr(); } -bool is_tme_supported(void) -{ - struct cpuid_result cpuid_regs; - - /* ECX[13] is feature capability */ - cpuid_regs = cpuid_ext(CPUID_STRUCT_EXTENDED_FEATURE_FLAGS, 0x0); - return (cpuid_regs.ecx & TME_SUPPORTED); -} - void set_tme_core_activate(void) { msr_t msr = { .lo = 0, .hi = 0 }; diff --git a/src/soc/intel/common/block/include/intelblocks/cpulib.h b/src/soc/intel/common/block/include/intelblocks/cpulib.h index cbc9e449de..5601d5d067 100644 --- a/src/soc/intel/common/block/include/intelblocks/cpulib.h +++ b/src/soc/intel/common/block/include/intelblocks/cpulib.h @@ -191,14 +191,6 @@ void enable_pm_timer_emulation(void); void init_core_prmrr(void); /* - * Check if TME is supported by the CPU - * - * coreboot shall detect the existence of TME feature by running CPUID instruction: - * CPUID leaf 7/sub-leaf 0: Return Value in ECX [bit 13] = 1 - */ -bool is_tme_supported(void); - -/* * Set TME core activate MSR * * Write zero to TME core activate MSR will translate the TME_ACTIVATE[MK_TME_KEYID_BITS] diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c index 36aa11e623..2a07753abc 100644 --- a/src/soc/intel/meteorlake/romstage/fsp_params.c +++ b/src/soc/intel/meteorlake/romstage/fsp_params.c @@ -2,6 +2,7 @@ #include <assert.h> #include <console/console.h> +#include <cpu/intel/common/common.h> #include <cpu/intel/cpu_ids.h> #include <cpu/x86/msr.h> #include <device/device.h> diff --git a/src/soc/intel/tigerlake/romstage/fsp_params.c b/src/soc/intel/tigerlake/romstage/fsp_params.c index dd771655f2..afcbf2f711 100644 --- a/src/soc/intel/tigerlake/romstage/fsp_params.c +++ b/src/soc/intel/tigerlake/romstage/fsp_params.c @@ -2,6 +2,7 @@ #include <assert.h> #include <console/console.h> +#include <cpu/intel/common/common.h> #include <cpu/intel/cpu_ids.h> #include <cpu/x86/msr.h> #include <device/device.h> |