diff options
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/denverton_ns/include/soc/iomap.h | 1 | ||||
| -rw-r--r-- | src/soc/intel/denverton_ns/pmc.c | 2 |
2 files changed, 1 insertions, 2 deletions
diff --git a/src/soc/intel/denverton_ns/include/soc/iomap.h b/src/soc/intel/denverton_ns/include/soc/iomap.h index fb5aafdfc8..c252ca11b6 100644 --- a/src/soc/intel/denverton_ns/include/soc/iomap.h +++ b/src/soc/intel/denverton_ns/include/soc/iomap.h @@ -12,7 +12,6 @@ /* Southbridge internal device IO BARs (Set to match FSP settings) */ #define DEFAULT_PMBASE 0x1800 -#define DEFAULT_ACPI_BASE DEFAULT_PMBASE #define ACPI_BASE_ADDRESS DEFAULT_PMBASE #define DEFAULT_TCO_BASE 0x400 diff --git a/src/soc/intel/denverton_ns/pmc.c b/src/soc/intel/denverton_ns/pmc.c index 8755825db2..258e6a4f83 100644 --- a/src/soc/intel/denverton_ns/pmc.c +++ b/src/soc/intel/denverton_ns/pmc.c @@ -16,7 +16,7 @@ /* While we read BAR dynamically in case it changed, let's * initialize it with a same value */ -static u16 acpi_base = DEFAULT_ACPI_BASE; +static u16 acpi_base = ACPI_BASE_ADDRESS; static u32 pwrm_base = DEFAULT_PWRM_BASE; static void pch_power_options(struct device *dev) { /* TODO */ } |