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-rw-r--r--src/soc/intel/braswell/acpi.c4
-rw-r--r--src/soc/intel/braswell/chip.c2
-rw-r--r--src/soc/intel/braswell/chip.h3
3 files changed, 2 insertions, 7 deletions
diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c
index a278e55742..718bfe995d 100644
--- a/src/soc/intel/braswell/acpi.c
+++ b/src/soc/intel/braswell/acpi.c
@@ -70,9 +70,7 @@ size_t size_of_dnvs(void)
void soc_fill_gnvs(struct global_nvs *gnvs)
{
- const struct soc_intel_braswell_config *config = config_of_soc();
-
- gnvs->dpte = config->dptf_enable;
+ gnvs->dpte = is_devfn_enabled(PCI_DEVFN(PUNIT_DEV, 0));
/* Fill in the Wi-Fi Region ID */
if (CONFIG(HAVE_REGULATORY_DOMAIN))
diff --git a/src/soc/intel/braswell/chip.c b/src/soc/intel/braswell/chip.c
index ce394d0baa..d3c41f8894 100644
--- a/src/soc/intel/braswell/chip.c
+++ b/src/soc/intel/braswell/chip.c
@@ -79,7 +79,7 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params)
params->AzaliaConfigPtr = 0;
params->PunitPwrConfigDisable = config->PunitPwrConfigDisable;
params->ChvSvidConfig = config->ChvSvidConfig;
- params->DptfDisable = config->DptfDisable;
+ params->DptfDisable = !is_devfn_enabled(PCI_DEVFN(PUNIT_DEV, 0));
params->PcdEmmcMode = config->PcdEmmcMode;
params->PcdUsb3ClkSsc = 1;
params->PcdDispClkSsc = 1;
diff --git a/src/soc/intel/braswell/chip.h b/src/soc/intel/braswell/chip.h
index 53627be577..de86a12488 100644
--- a/src/soc/intel/braswell/chip.h
+++ b/src/soc/intel/braswell/chip.h
@@ -42,8 +42,6 @@ enum usb_comp_bg_value {
struct soc_intel_braswell_config {
bool enable_xdp_tap;
- bool dptf_enable;
-
enum serirq_mode serirq_mode;
/* Disable SLP_X stretching after SUS power well loss */
@@ -104,7 +102,6 @@ struct soc_intel_braswell_config {
uint8_t PcdEnableI2C6;
uint8_t PunitPwrConfigDisable;
uint8_t ChvSvidConfig;
- uint8_t DptfDisable;
uint8_t PcdEmmcMode;
uint8_t Usb2Port0PerPortPeTxiSet;
uint8_t Usb2Port0PerPortTxiSet;