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-rw-r--r--src/soc/intel/baytrail/acpi/southcluster.asl3
-rw-r--r--src/soc/intel/baytrail/acpi/xhci.asl36
2 files changed, 39 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/acpi/southcluster.asl b/src/soc/intel/baytrail/acpi/southcluster.asl
index ced161876d..61642a59a9 100644
--- a/src/soc/intel/baytrail/acpi/southcluster.asl
+++ b/src/soc/intel/baytrail/acpi/southcluster.asl
@@ -252,6 +252,9 @@ Device (IOSF)
// LPC Bridge 0:1f.0
#include "lpc.asl"
+// USB XHCI 0:14.0
+#include "xhci.asl"
+
// IRQ routing for each PCI device
#include "irqroute.asl"
diff --git a/src/soc/intel/baytrail/acpi/xhci.asl b/src/soc/intel/baytrail/acpi/xhci.asl
new file mode 100644
index 0000000000..4d5367acec
--- /dev/null
+++ b/src/soc/intel/baytrail/acpi/xhci.asl
@@ -0,0 +1,36 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+Device (XHCI)
+{
+ Name (_ADR, 0x00140000)
+ Name (_PRW, Package () { 0x0d, 3 })
+ Name (_S3D, 3) /* Highest D state in S3 state */
+
+ Device (RHUB)
+ {
+ Name (_ADR, 0x00000000)
+ Device (PRT1) { Name (_ADR, 1) }
+ Device (PRT2) { Name (_ADR, 2) }
+ Device (PRT3) { Name (_ADR, 3) }
+ Device (PRT4) { Name (_ADR, 4) }
+ }
+}