diff options
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/cannonlake/acpi.c | 4 | ||||
-rw-r--r-- | src/soc/intel/cannonlake/chip.c | 4 | ||||
-rw-r--r-- | src/soc/intel/cannonlake/cpu.c | 6 | ||||
-rw-r--r-- | src/soc/intel/cannonlake/finalize.c | 2 | ||||
-rw-r--r-- | src/soc/intel/cannonlake/pmc.c | 2 | ||||
-rw-r--r-- | src/soc/intel/cannonlake/smmrelocate.c | 2 |
6 files changed, 10 insertions, 10 deletions
diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c index 0134b86865..97d5ce7aa6 100644 --- a/src/soc/intel/cannonlake/acpi.c +++ b/src/soc/intel/cannonlake/acpi.c @@ -142,7 +142,7 @@ acpi_cstate_t *soc_get_cstate_map(size_t *entries) ARRAY_SIZE(cstate_set_non_s0ix))]; int *set; int i; - device_t dev = SA_DEV_ROOT; + struct device *dev = SA_DEV_ROOT; config_t *config = dev->chip_info; int is_s0ix_enable = config->s0ix_enable; @@ -163,7 +163,7 @@ acpi_cstate_t *soc_get_cstate_map(size_t *entries) void soc_power_states_generation(int core_id, int cores_per_package) { - device_t dev = SA_DEV_ROOT; + struct device *dev = SA_DEV_ROOT; config_t *config = dev->chip_info; if (config->eist_enable) /* Generate P-state tables */ diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c index fd9ce526f5..0c4232c277 100644 --- a/src/soc/intel/cannonlake/chip.c +++ b/src/soc/intel/cannonlake/chip.c @@ -140,7 +140,7 @@ void soc_init_pre_device(void *chip_info) fsp_display_fvi_version_hob(); } -static void pci_domain_set_resources(device_t dev) +static void pci_domain_set_resources(struct device *dev) { assign_resources(dev->link_list); } @@ -162,7 +162,7 @@ static struct device_operations cpu_bus_ops = { .acpi_fill_ssdt_generator = generate_cpu_entries, }; -static void soc_enable(device_t dev) +static void soc_enable(struct device *dev) { /* Set the operations if it is a special bus type */ if (dev->path.type == DEVICE_PATH_DOMAIN) diff --git a/src/soc/intel/cannonlake/cpu.c b/src/soc/intel/cannonlake/cpu.c index a0797bc9c8..dc413e2df1 100644 --- a/src/soc/intel/cannonlake/cpu.c +++ b/src/soc/intel/cannonlake/cpu.c @@ -36,7 +36,7 @@ static void soc_fsp_load(void) static void configure_isst(void) { - device_t dev = SA_DEV_ROOT; + struct device *dev = SA_DEV_ROOT; config_t *conf = dev->chip_info; msr_t msr; @@ -62,7 +62,7 @@ static void configure_isst(void) static void configure_misc(void) { - device_t dev = SA_DEV_ROOT; + struct device *dev = SA_DEV_ROOT; config_t *conf = dev->chip_info; msr_t msr; @@ -166,7 +166,7 @@ static void configure_c_states(void) } /* All CPUs including BSP will run the following function. */ -void soc_core_init(device_t cpu) +void soc_core_init(struct device *cpu) { /* Clear out pending MCEs */ /* TODO(adurbin): This should only be done on a cold boot. Also, some diff --git a/src/soc/intel/cannonlake/finalize.c b/src/soc/intel/cannonlake/finalize.c index 5216460e60..b3c07b1154 100644 --- a/src/soc/intel/cannonlake/finalize.c +++ b/src/soc/intel/cannonlake/finalize.c @@ -53,7 +53,7 @@ static void pch_handle_sideband(config_t *config) static void pch_finalize(void) { - device_t dev; + struct device *dev; uint32_t reg32; uint16_t tcobase, tcocnt; uint8_t *pmcbase; diff --git a/src/soc/intel/cannonlake/pmc.c b/src/soc/intel/cannonlake/pmc.c index c6c1694561..ecd47e0593 100644 --- a/src/soc/intel/cannonlake/pmc.c +++ b/src/soc/intel/cannonlake/pmc.c @@ -137,7 +137,7 @@ static void pch_power_options(struct device *dev) static void pmc_init(void *unused) { - device_t dev = PCH_DEV_PMC; + struct device *dev = PCH_DEV_PMC; config_t *config = dev->chip_info; rtc_init(); diff --git a/src/soc/intel/cannonlake/smmrelocate.c b/src/soc/intel/cannonlake/smmrelocate.c index 20da625511..83330e6ba6 100644 --- a/src/soc/intel/cannonlake/smmrelocate.c +++ b/src/soc/intel/cannonlake/smmrelocate.c @@ -170,7 +170,7 @@ void smm_relocation_handler(int cpu, uintptr_t curr_smbase, write_smrr(relo_params); } -static void fill_in_relocation_params(device_t dev, +static void fill_in_relocation_params(struct device *dev, struct smm_relocation_params *params) { void *handler_base; |