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-rw-r--r--src/soc/intel/denverton_ns/hob_mem.c2
-rw-r--r--src/soc/intel/denverton_ns/include/soc/gpio_dnv.h2
-rw-r--r--src/soc/intel/denverton_ns/include/soc/pm.h2
3 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/denverton_ns/hob_mem.c b/src/soc/intel/denverton_ns/hob_mem.c
index 326e716cbc..5e72d6ed17 100644
--- a/src/soc/intel/denverton_ns/hob_mem.c
+++ b/src/soc/intel/denverton_ns/hob_mem.c
@@ -112,7 +112,7 @@ void soc_save_dimm_info(void)
}
/* Add any mainboard specific information */
-__attribute__((weak)) void mainboard_add_dimm_info(struct memory_info *mem_info,
+__weak void mainboard_add_dimm_info(struct memory_info *mem_info,
int channel, int dimm,
int index)
{
diff --git a/src/soc/intel/denverton_ns/include/soc/gpio_dnv.h b/src/soc/intel/denverton_ns/include/soc/gpio_dnv.h
index 06a0721fa1..ed26d52f34 100644
--- a/src/soc/intel/denverton_ns/include/soc/gpio_dnv.h
+++ b/src/soc/intel/denverton_ns/include/soc/gpio_dnv.h
@@ -133,7 +133,7 @@ struct GPIO_CONFIG {
**/
uint32_t OtherSettings : 2;
uint32_t RsvdBits : 27; ///< Reserved bits for future extension
-} __attribute__((packed));
+} __packed;
typedef enum { GpioHardwareDefault = 0x0 } GPIO_HARDWARE_DEFAULT;
diff --git a/src/soc/intel/denverton_ns/include/soc/pm.h b/src/soc/intel/denverton_ns/include/soc/pm.h
index 368fac8e3d..d1345e05af 100644
--- a/src/soc/intel/denverton_ns/include/soc/pm.h
+++ b/src/soc/intel/denverton_ns/include/soc/pm.h
@@ -26,7 +26,7 @@ struct chipset_power_state {
uint32_t gen_pmcon_b;
uint32_t gblrst_cause[2];
uint32_t prev_sleep_state;
-} __attribute__((packed));
+} __packed;
/* Get base address PMC memory mapped registers. */
uint8_t *pmc_mmio_regs(void);