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-rw-r--r--src/soc/intel/common/block/include/intelblocks/gpio_defs.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h
index e1ddd4babb..0a3e11737a 100644
--- a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h
+++ b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h
@@ -134,6 +134,15 @@
#define PAD_RESET(value) PAD_CFG0_LOGICAL_RESET_##value
#define PAD_PULL(value) PAD_CFG1_PULL_##value
+/* Disable the input/output buffer of the pad */
+#define PAD_CFG0_BUF_NO_DISABLE (0)
+#define PAD_CFG0_BUF_TX_DISABLE PAD_CFG0_TX_DISABLE
+#define PAD_CFG0_BUF_RX_DISABLE PAD_CFG0_RX_DISABLE
+#define PAD_CFG0_BUF_TX_RX_DISABLE \
+ (PAD_CFG0_TX_DISABLE | PAD_CFG0_RX_DISABLE)
+
+#define PAD_BUF(value) PAD_CFG0_BUF_##value
+
#if CONFIG(SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY)
#define PAD_IOSSTATE(value) PAD_CFG1_IOSSTATE_##value
#define PAD_IOSTERM(value) PAD_CFG1_IOSTERM_##value
@@ -180,6 +189,15 @@
_PAD_CFG_STRUCT(pad, PAD_RESET(rst) | PAD_FUNC(func), PAD_PULL(pull) | \
PAD_IOSSTATE(TxLASTRxE))
+/*
+ * Set native function with RX Level/Edge configuration and disable
+ * input/output buffer if necessary
+ */
+#define PAD_CFG_NF_BUF_TRIG(pad, pull, rst, func, bufdis, trig) \
+ _PAD_CFG_STRUCT(pad, PAD_RESET(rst) | PAD_CFG0_TRIG_##trig | \
+ PAD_BUF(bufdis) | PAD_FUNC(func), \
+ PAD_PULL(pull) | PAD_IOSSTATE(TxLASTRxE))
+
#if CONFIG(SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL)
/* Native 1.8V tolerant pad, only applies to some pads like I2C/I2S
Not applicable to all SOCs. Refer EDS