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-rw-r--r--src/soc/intel/cannonlake/fsp_params.c4
-rw-r--r--src/soc/intel/cannonlake/include/soc/ramstage.h2
2 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index 9b28d3d795..73b1bb53ed 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -143,7 +143,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
/* Load VBT before devicetree-specific config. */
params->GraphicsConfigPtr = (uintptr_t)vbt_get();
- mainboard_silicon_init_params(params);
+ mainboard_silicon_init_params(supd);
const struct soc_power_limits_config *soc_config;
soc_config = &config->power_limits_config;
@@ -527,7 +527,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
}
/* Mainboard GPIO Configuration */
-__weak void mainboard_silicon_init_params(FSP_S_CONFIG *params)
+__weak void mainboard_silicon_init_params(FSPS_UPD *supd)
{
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
}
diff --git a/src/soc/intel/cannonlake/include/soc/ramstage.h b/src/soc/intel/cannonlake/include/soc/ramstage.h
index 96b11298a7..ff4fd59f8c 100644
--- a/src/soc/intel/cannonlake/include/soc/ramstage.h
+++ b/src/soc/intel/cannonlake/include/soc/ramstage.h
@@ -9,7 +9,7 @@
#include "../../chip.h"
-void mainboard_silicon_init_params(FSP_S_CONFIG *params);
+void mainboard_silicon_init_params(FSPS_UPD *supd);
void soc_init_pre_device(void *chip_info);
#endif