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-rw-r--r--src/soc/intel/cannonlake/Kconfig11
-rw-r--r--src/soc/intel/cannonlake/romstage/fsp_params.c3
2 files changed, 1 insertions, 13 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 3aa06f43d8..d012dadbe2 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -321,17 +321,6 @@ config FSP_FD_PATH
config FSP_FD_PATH_2
default "3rdparty/fsp/CometLakeFspBinPkg/CometLake2/Fsp.fd" if SOC_INTEL_COMETLAKE_1_2
-config SOC_INTEL_CANNONLAKE_DEBUG_CONSENT
- int "Debug Consent for CNL"
- # USB DBC is more common for developers so make this default to 3 if
- # SOC_INTEL_DEBUG_CONSENT=y
- default 3 if SOC_INTEL_DEBUG_CONSENT
- default 0
- help
- This is to control debug interface on SOC.
- Setting non-zero value will allow to use DBC or DCI to debug SOC.
- PlatformDebugConsent in FspmUpd.h has the details.
-
config PRERAM_CBMEM_CONSOLE_SIZE
hex
default 0xe00
diff --git a/src/soc/intel/cannonlake/romstage/fsp_params.c b/src/soc/intel/cannonlake/romstage/fsp_params.c
index 2b25285ffa..f0dd1c39cd 100644
--- a/src/soc/intel/cannonlake/romstage/fsp_params.c
+++ b/src/soc/intel/cannonlake/romstage/fsp_params.c
@@ -124,8 +124,7 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
m_cfg->SmbusEnable = is_devfn_enabled(PCH_DEVFN_SMBUS);
/* Set debug probe type */
- m_cfg->PlatformDebugConsent =
- CONFIG_SOC_INTEL_CANNONLAKE_DEBUG_CONSENT;
+ m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT;
/* Configure VT-d */
tconfig->VtdDisable = 0;