diff options
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/meteorlake/romstage/romstage.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/intel/meteorlake/romstage/romstage.c b/src/soc/intel/meteorlake/romstage/romstage.c index 35f9368b5a..340716fd23 100644 --- a/src/soc/intel/meteorlake/romstage/romstage.c +++ b/src/soc/intel/meteorlake/romstage/romstage.c @@ -119,23 +119,23 @@ static void save_dimm_info(void) void mainboard_romstage_entry(void) { - bool s3wake; struct chipset_power_state *ps = pmc_get_power_state(); + bool s3wake = pmc_fill_power_state(ps) == ACPI_S3; - /* Program MCHBAR, DMIBAR, GDXBAR and EDRAMBAR */ - systemagent_early_init(); - /* Program SMBus base address and enable it */ - smbus_common_init(); /* Initialize HECI interface */ cse_init(HECI1_BASE_ADDRESS); - s3wake = pmc_fill_power_state(ps) == ACPI_S3; if (!s3wake && CONFIG(SOC_INTEL_CSE_LITE_SKU)) { timestamp_add_now(TS_CSE_FW_SYNC_START); cse_fw_sync(); timestamp_add_now(TS_CSE_FW_SYNC_END); } + /* Program MCHBAR, DMIBAR, GDXBAR and EDRAMBAR */ + systemagent_early_init(); + /* Program SMBus base address and enable it */ + smbus_common_init(); + /* * Set low maximum temp threshold value used for dynamic thermal sensor * shutdown consideration. |