diff options
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/apollolake/acpi/northbridge.asl | 5 | ||||
| -rw-r--r-- | src/soc/intel/baytrail/acpi/southcluster.asl | 1 | ||||
| -rw-r--r-- | src/soc/intel/braswell/acpi/southcluster.asl | 1 | ||||
| -rw-r--r-- | src/soc/intel/common/block/acpi/acpi/northbridge.asl | 11 | ||||
| -rw-r--r-- | src/soc/intel/denverton_ns/acpi/northcluster.asl | 2 | ||||
| -rw-r--r-- | src/soc/intel/skylake/acpi/systemagent.asl | 11 |
6 files changed, 0 insertions, 31 deletions
diff --git a/src/soc/intel/apollolake/acpi/northbridge.asl b/src/soc/intel/apollolake/acpi/northbridge.asl index 1b47509094..a304331f1d 100644 --- a/src/soc/intel/apollolake/acpi/northbridge.asl +++ b/src/soc/intel/apollolake/acpi/northbridge.asl @@ -116,11 +116,6 @@ Device (PDRC) /* PCI Device Resource Consumption */ { Name (BUF0, ResourceTemplate () { - /* PCI Express BAR */ - Memory32Fixed (ReadWrite, - CONFIG_ECAM_MMCONF_BASE_ADDRESS, - CONFIG_ECAM_MMCONF_LENGTH, PCIX) - /* Local APIC range (0xfee0_0000 to 0xfeef_ffff) */ Memory32Fixed (ReadOnly, 0x0fee00000, 0x00010000, LIOH) }) diff --git a/src/soc/intel/baytrail/acpi/southcluster.asl b/src/soc/intel/baytrail/acpi/southcluster.asl index dacdd29e06..131825e341 100644 --- a/src/soc/intel/baytrail/acpi/southcluster.asl +++ b/src/soc/intel/baytrail/acpi/southcluster.asl @@ -189,7 +189,6 @@ Device (PDRC) Name (PDRS, ResourceTemplate() { Memory32Fixed(ReadWrite, ABORT_BASE_ADDRESS, ABORT_BASE_SIZE) - Memory32Fixed(ReadWrite, CONFIG_ECAM_MMCONF_BASE_ADDRESS, CONFIG_ECAM_MMCONF_LENGTH) Memory32Fixed(ReadWrite, PMC_BASE_ADDRESS, PMC_BASE_SIZE) Memory32Fixed(ReadWrite, ILB_BASE_ADDRESS, ILB_BASE_SIZE) Memory32Fixed(ReadWrite, SPI_BASE_ADDRESS, SPI_BASE_SIZE) diff --git a/src/soc/intel/braswell/acpi/southcluster.asl b/src/soc/intel/braswell/acpi/southcluster.asl index 3dcc6c1951..1e52df171f 100644 --- a/src/soc/intel/braswell/acpi/southcluster.asl +++ b/src/soc/intel/braswell/acpi/southcluster.asl @@ -188,7 +188,6 @@ Device (PDRC) Name (PDRS, ResourceTemplate() { Memory32Fixed(ReadWrite, ABORT_BASE_ADDRESS, ABORT_BASE_SIZE) - Memory32Fixed(ReadWrite, CONFIG_ECAM_MMCONF_BASE_ADDRESS, CONFIG_ECAM_MMCONF_LENGTH) Memory32Fixed(ReadWrite, PMC_BASE_ADDRESS, PMC_BASE_SIZE) Memory32Fixed(ReadWrite, ILB_BASE_ADDRESS, ILB_BASE_SIZE) Memory32Fixed(ReadWrite, SPI_BASE_ADDRESS, SPI_BASE_SIZE) diff --git a/src/soc/intel/common/block/acpi/acpi/northbridge.asl b/src/soc/intel/common/block/acpi/acpi/northbridge.asl index d605625bc5..44c873c8e5 100644 --- a/src/soc/intel/common/block/acpi/acpi/northbridge.asl +++ b/src/soc/intel/common/block/acpi/acpi/northbridge.asl @@ -269,11 +269,6 @@ Device (PDRC) */ Memory32Fixed (ReadWrite, 0, EP_BASE_SIZE, EGPB) - /* PCI Express BAR _BAS and _LEN will be updated in - * _CRS below according to B0:D0:F0:Reg.60h - */ - Memory32Fixed (ReadWrite, 0, 0, PCIX) - /* VTD engine memory range. */ Memory32Fixed (ReadOnly, VTD_BASE_ADDRESS, VTD_BASE_SIZE) @@ -301,12 +296,6 @@ Device (PDRC) CreateDwordField (BUF0, EGPB._BAS, EBR0) EBR0 = \_SB.PCI0.GEPB () - CreateDwordField (BUF0, PCIX._BAS, XBR0) - XBR0 = \_SB.PCI0.GPCB () - - CreateDwordField (BUF0, PCIX._LEN, XSZ0) - XSZ0 = \_SB.PCI0.GPCL () - CreateDwordField (BUF0, FIOH._BAS, FBR0) FBR0 = 0x100000000 - CONFIG_ROM_SIZE diff --git a/src/soc/intel/denverton_ns/acpi/northcluster.asl b/src/soc/intel/denverton_ns/acpi/northcluster.asl index e415dc4ea3..ce687dd384 100644 --- a/src/soc/intel/denverton_ns/acpi/northcluster.asl +++ b/src/soc/intel/denverton_ns/acpi/northcluster.asl @@ -121,8 +121,6 @@ Device (PDRC) Name (_UID, 1) Name (PDRS, ResourceTemplate() { - // PCIEXBAR memory range - Memory32Fixed(ReadOnly, CONFIG_ECAM_MMCONF_BASE_ADDRESS, CONFIG_ECAM_MMCONF_LENGTH) // TSEG Memory32Fixed(ReadOnly, 0x00000000, 0x00000000, TSMB) }) diff --git a/src/soc/intel/skylake/acpi/systemagent.asl b/src/soc/intel/skylake/acpi/systemagent.asl index 0e5d74f297..762c4f7bf3 100644 --- a/src/soc/intel/skylake/acpi/systemagent.asl +++ b/src/soc/intel/skylake/acpi/systemagent.asl @@ -287,11 +287,6 @@ Device (PDRC) */ Memory32Fixed (ReadWrite, 0, 0x01000, EGPB) - /* PCI Express BAR _BAS and _LEN will be updated in - * _CRS below according to B0:D0:F0:Reg.60h - */ - Memory32Fixed (ReadWrite, 0, 0, PCIX) - /* VTD engine memory range. */ Memory32Fixed (ReadOnly, VTD_BASE_ADDRESS, VTD_BASE_SIZE) @@ -314,12 +309,6 @@ Device (PDRC) CreateDwordField (BUF0, EGPB._BAS, EBR0) EBR0 = \_SB.PCI0.GEPB () - CreateDwordField (BUF0, PCIX._BAS, XBR0) - XBR0 = \_SB.PCI0.GPCB () - - CreateDwordField (BUF0, PCIX._LEN, XSZ0) - XSZ0 = \_SB.PCI0.GPCL () - CreateDwordField (BUF0, FIOH._BAS, FBR0) FBR0 = 0x100000000 - CONFIG_ROM_SIZE |