summaryrefslogtreecommitdiff
path: root/src/soc/intel
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/braswell/acpi/dptf/thermal.asl5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/soc/intel/braswell/acpi/dptf/thermal.asl b/src/soc/intel/braswell/acpi/dptf/thermal.asl
index e104756b3e..1fdbea01ca 100644
--- a/src/soc/intel/braswell/acpi/dptf/thermal.asl
+++ b/src/soc/intel/braswell/acpi/dptf/thermal.asl
@@ -1,6 +1,8 @@
/*
* This file is part of the coreboot project.
*
+ * Copyright (C) 2018 Eltan B.V.
+ *
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of
@@ -13,7 +15,7 @@
*/
/* Thermal Threshold Event Handler */
-#define HAVE_THERM_EVENT_HANDLER
+#ifdef HAVE_THERM_EVENT_HANDLER
Method (TEVT, 1, NotSerialized)
{
Store (ToInteger (Arg0), Local0)
@@ -34,6 +36,7 @@ Method (TEVT, 1, NotSerialized)
}
#endif
}
+#endif
/* Thermal device initialization - Disable Aux Trip Points */
Method (TINI)