3 files changed, 4 insertions, 7 deletions
diff --git a/src/soc/intel/tigerlake/Makefile.mk b/src/soc/intel/tigerlake/Makefile.mk
index 435572e10a..27e07a99b4 100644
--- a/src/soc/intel/tigerlake/Makefile.mk
+++ b/src/soc/intel/tigerlake/Makefile.mk
@@ -20,6 +20,7 @@ bootblock-y += p2sb.c
 
 romstage-y += espi.c
 romstage-y += meminit.c
+romstage-y += pcie_rp.c
 romstage-y += reset.c
 
 ramstage-y += acpi.c
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index 3de8ffaf43..8700dd5d51 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -258,7 +258,6 @@ struct soc_intel_tigerlake_config {
 	uint8_t PchHdaIDispCodecDisconnect;
 
 	/* PCIe Root Ports */
-	uint8_t PcieRpEnable[CONFIG_MAX_ROOT_PORTS];
 	uint8_t PcieRpHotPlug[CONFIG_MAX_ROOT_PORTS];
 	/* Implemented as slot or built-in? */
 	uint8_t PcieRpSlotImplemented[CONFIG_MAX_ROOT_PORTS];
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params.c b/src/soc/intel/tigerlake/romstage/fsp_params.c
index afcbf2f711..baf2eb36cf 100644
--- a/src/soc/intel/tigerlake/romstage/fsp_params.c
+++ b/src/soc/intel/tigerlake/romstage/fsp_params.c
@@ -9,6 +9,7 @@
 #include <fsp/util.h>
 #include <gpio.h>
 #include <intelblocks/cpulib.h>
+#include <intelblocks/pcie_rp.h>
 #include <option.h>
 #include <soc/iomap.h>
 #include <soc/msr.h>
@@ -21,7 +22,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
 		const struct soc_intel_tigerlake_config *config)
 {
 	unsigned int i;
-	uint32_t cpu_id, mask = 0;
+	uint32_t cpu_id;
 
 	m_cfg->HyperThreading = get_uint_option("hyper_threading", CONFIG(FSP_HYPERTHREADING));
 
@@ -49,11 +50,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
 		m_cfg->CpuRatio = (flex_ratio.lo >> 8) & 0xff;
 	}
 
-	for (i = 0; i < ARRAY_SIZE(config->PcieRpEnable); i++) {
-		if (config->PcieRpEnable[i])
-			mask |= (1 << i);
-	}
-	m_cfg->PcieRpEnableMask = mask;
+	m_cfg->PcieRpEnableMask = pcie_rp_enable_mask(soc_get_pch_rp_groups());
 
 	memcpy(m_cfg->PcieClkSrcUsage, config->PcieClkSrcUsage,
 		sizeof(config->PcieClkSrcUsage));