summaryrefslogtreecommitdiff
path: root/src/soc/intel
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/alderlake/pmc.c2
-rw-r--r--src/soc/intel/apollolake/systemagent.c4
-rw-r--r--src/soc/intel/baytrail/lpe.c2
-rw-r--r--src/soc/intel/baytrail/northcluster.c16
-rw-r--r--src/soc/intel/baytrail/southcluster.c2
-rw-r--r--src/soc/intel/braswell/lpe.c2
-rw-r--r--src/soc/intel/braswell/northcluster.c18
-rw-r--r--src/soc/intel/braswell/southcluster.c2
-rw-r--r--src/soc/intel/broadwell/northbridge.c14
-rw-r--r--src/soc/intel/cannonlake/pmc.c2
-rw-r--r--src/soc/intel/common/block/fast_spi/fast_spi.c2
-rw-r--r--src/soc/intel/common/block/p2sb/ioe_p2sb.c2
-rw-r--r--src/soc/intel/common/block/p2sb/p2sb.c2
-rw-r--r--src/soc/intel/common/block/systemagent/systemagent.c18
-rw-r--r--src/soc/intel/denverton_ns/systemagent.c10
-rw-r--r--src/soc/intel/elkhartlake/pmc.c2
-rw-r--r--src/soc/intel/jasperlake/pmc.c2
-rw-r--r--src/soc/intel/quark/northcluster.c12
-rw-r--r--src/soc/intel/tigerlake/pmc.c2
-rw-r--r--src/soc/intel/xeon_sp/uncore.c16
20 files changed, 66 insertions, 66 deletions
diff --git a/src/soc/intel/alderlake/pmc.c b/src/soc/intel/alderlake/pmc.c
index cce095ab22..7358fb669d 100644
--- a/src/soc/intel/alderlake/pmc.c
+++ b/src/soc/intel/alderlake/pmc.c
@@ -85,7 +85,7 @@ static void soc_pmc_read_resources(struct device *dev)
struct resource *res;
/* Add the fixed MMIO resource */
- mmio_resource(dev, 0, PCH_PWRM_BASE_ADDRESS / KiB, PCH_PWRM_BASE_SIZE / KiB);
+ mmio_resource_kb(dev, 0, PCH_PWRM_BASE_ADDRESS / KiB, PCH_PWRM_BASE_SIZE / KiB);
/* Add the fixed I/O resource */
res = new_resource(dev, 1);
diff --git a/src/soc/intel/apollolake/systemagent.c b/src/soc/intel/apollolake/systemagent.c
index d6e23acb59..f352f8af23 100644
--- a/src/soc/intel/apollolake/systemagent.c
+++ b/src/soc/intel/apollolake/systemagent.c
@@ -32,13 +32,13 @@ void soc_add_fixed_mmio_resources(struct device *dev, int *index)
return;
if (MCHBAR32(GFXVTBAR) & VTBAR_ENABLED) {
- mmio_resource(dev, *index,
+ mmio_resource_kb(dev, *index,
(MCHBAR64(GFXVTBAR) & VTBAR_MASK) / KiB,
VTBAR_SIZE / KiB);
(*index)++;
}
if (MCHBAR32(DEFVTBAR) & VTBAR_ENABLED) {
- mmio_resource(dev, *index,
+ mmio_resource_kb(dev, *index,
(MCHBAR64(DEFVTBAR) & VTBAR_MASK) / KiB,
VTBAR_SIZE / KiB);
(*index)++;
diff --git a/src/soc/intel/baytrail/lpe.c b/src/soc/intel/baytrail/lpe.c
index 03ac736793..851f52e2a5 100644
--- a/src/soc/intel/baytrail/lpe.c
+++ b/src/soc/intel/baytrail/lpe.c
@@ -147,7 +147,7 @@ static void lpe_read_resources(struct device *dev)
{
pci_dev_read_resources(dev);
- reserved_ram_resource(dev, FIRMWARE_PCI_REG_BASE,
+ reserved_ram_resource_kb(dev, FIRMWARE_PCI_REG_BASE,
FIRMWARE_PHYS_BASE >> 10,
FIRMWARE_PHYS_LENGTH >> 10);
}
diff --git a/src/soc/intel/baytrail/northcluster.c b/src/soc/intel/baytrail/northcluster.c
index cd8c6d4fd7..5b728e7313 100644
--- a/src/soc/intel/baytrail/northcluster.c
+++ b/src/soc/intel/baytrail/northcluster.c
@@ -77,12 +77,12 @@ static void nc_read_resources(struct device *dev)
/* PCIe memory-mapped config space access - 256 MiB. */
mmconf = iosf_bunit_read(BUNIT_MMCONF_REG) & ~((1 << 28) - 1);
- mmio_resource(dev, BUNIT_MMCONF_REG, RES_IN_KiB(mmconf), 256 * 1024);
+ mmio_resource_kb(dev, BUNIT_MMCONF_REG, RES_IN_KiB(mmconf), 256 * 1024);
/* 0 -> 0xa0000 */
base_k = RES_IN_KiB(0);
size_k = RES_IN_KiB(0xa0000) - base_k;
- ram_resource(dev, index++, base_k, size_k);
+ ram_resource_kb(dev, index++, base_k, size_k);
/* The SMMRR registers are 1MiB granularity with smmrrh being
* inclusive of the SMM region. */
@@ -92,14 +92,14 @@ static void nc_read_resources(struct device *dev)
/* 0xc0000 -> smrrl - cacheable and usable */
base_k = RES_IN_KiB(0xc0000);
size_k = smmrrl - base_k;
- ram_resource(dev, index++, base_k, size_k);
+ ram_resource_kb(dev, index++, base_k, size_k);
if (smmrrh > smmrrl)
- reserved_ram_resource(dev, index++, smmrrl, smmrrh - smmrrl);
+ reserved_ram_resource_kb(dev, index++, smmrrl, smmrrh - smmrrl);
/* All address space between bmbound and smmrrh is unusable. */
bmbound_k = RES_IN_KiB(nc_read_top_of_low_memory());
- mmio_resource(dev, index++, smmrrh, bmbound_k - smmrrh);
+ mmio_resource_kb(dev, index++, smmrrh, bmbound_k - smmrrh);
/*
* The BMBOUND_HI register matches register bits of 31:24 with address
@@ -108,7 +108,7 @@ static void nc_read_resources(struct device *dev)
bmbound_hi = iosf_bunit_read(BUNIT_BMBOUND_HI) & ~((1 << 24) - 1);
bmbound_hi = RES_IN_KiB(bmbound_hi) << 4;
if (bmbound_hi > four_gig_kib)
- ram_resource(dev, index++, four_gig_kib, bmbound_hi - four_gig_kib);
+ ram_resource_kb(dev, index++, four_gig_kib, bmbound_hi - four_gig_kib);
/*
* Reserve everything between A segment and 1MB:
@@ -116,8 +116,8 @@ static void nc_read_resources(struct device *dev)
* 0xa0000 - 0xbffff: legacy VGA
* 0xc0000 - 0xfffff: RAM
*/
- mmio_resource(dev, index++, (0xa0000 >> 10), (0xc0000 - 0xa0000) >> 10);
- reserved_ram_resource(dev, index++, (0xc0000 >> 10), (0x100000 - 0xc0000) >> 10);
+ mmio_resource_kb(dev, index++, (0xa0000 >> 10), (0xc0000 - 0xa0000) >> 10);
+ reserved_ram_resource_kb(dev, index++, (0xc0000 >> 10), (0x100000 - 0xc0000) >> 10);
}
static void nc_generate_ssdt(const struct device *dev)
diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c
index 8356e5d641..57205459db 100644
--- a/src/soc/intel/baytrail/southcluster.c
+++ b/src/soc/intel/baytrail/southcluster.c
@@ -26,7 +26,7 @@
static inline void add_mmio_resource(struct device *dev, int i, unsigned long addr,
unsigned long size)
{
- mmio_resource(dev, i, addr >> 10, size >> 10);
+ mmio_resource_kb(dev, i, addr >> 10, size >> 10);
}
static void sc_add_mmio_resources(struct device *dev)
diff --git a/src/soc/intel/braswell/lpe.c b/src/soc/intel/braswell/lpe.c
index 109ad84772..27f38ead5d 100644
--- a/src/soc/intel/braswell/lpe.c
+++ b/src/soc/intel/braswell/lpe.c
@@ -154,7 +154,7 @@ static void lpe_read_resources(struct device *dev)
res->align = 12;
res->flags = IORESOURCE_MEM;
- reserved_ram_resource(dev, FIRMWARE_PCI_REG_BASE, FIRMWARE_PHYS_BASE >> 10,
+ reserved_ram_resource_kb(dev, FIRMWARE_PCI_REG_BASE, FIRMWARE_PHYS_BASE >> 10,
FIRMWARE_PHYS_LENGTH >> 10);
}
diff --git a/src/soc/intel/braswell/northcluster.c b/src/soc/intel/braswell/northcluster.c
index d9a516d57d..a39b6db030 100644
--- a/src/soc/intel/braswell/northcluster.c
+++ b/src/soc/intel/braswell/northcluster.c
@@ -99,26 +99,26 @@ static void nc_read_resources(struct device *dev)
/* PCIe memory-mapped config space access - 256 MiB. */
mmconf = iosf_bunit_read(BUNIT_MMCONF_REG) & ~((1 << 28) - 1);
- mmio_resource(dev, BUNIT_MMCONF_REG, RES_IN_KiB(mmconf), 256 * 1024);
+ mmio_resource_kb(dev, BUNIT_MMCONF_REG, RES_IN_KiB(mmconf), 256 * 1024);
/* 0 -> 0xa0000 */
base_k = RES_IN_KiB(0);
size_k = RES_IN_KiB(0xa0000) - base_k;
- ram_resource(dev, index++, base_k, size_k);
+ ram_resource_kb(dev, index++, base_k, size_k);
/* High memory -> fsp_res_base - cacheable and usable */
base_k = RES_IN_KiB(0x100000);
size_k = fsp_res_base_k - base_k;
- ram_resource(dev, index++, base_k, size_k);
+ ram_resource_kb(dev, index++, base_k, size_k);
/* fsp_res_base -> tseg_top - Reserved */
base_k = fsp_res_base_k;
size_k = tseg_top_k - base_k;
- reserved_ram_resource(dev, index++, base_k, size_k);
+ reserved_ram_resource_kb(dev, index++, base_k, size_k);
/* TSEG TOP -> bmbound is memory backed mmio. */
bmbound_k = RES_IN_KiB(nc_read_top_of_low_memory());
- mmio_resource(dev, index++, tseg_top_k, bmbound_k - tseg_top_k);
+ mmio_resource_kb(dev, index++, tseg_top_k, bmbound_k - tseg_top_k);
/*
* The BMBOUND_HI register matches register bits of 31:24 with address
@@ -127,7 +127,7 @@ static void nc_read_resources(struct device *dev)
bmbound_hi = iosf_bunit_read(BUNIT_BMBOUND_HI) & ~((1 << 24) - 1);
bmbound_hi = RES_IN_KiB(bmbound_hi) << 4;
if (bmbound_hi > four_gig_kib)
- ram_resource(dev, index++, four_gig_kib, bmbound_hi - four_gig_kib);
+ ram_resource_kb(dev, index++, four_gig_kib, bmbound_hi - four_gig_kib);
/*
* Reserve everything between A segment and 1MB:
@@ -135,15 +135,15 @@ static void nc_read_resources(struct device *dev)
* 0xa0000 - 0xbffff: legacy VGA
* 0xc0000 - 0xfffff: RAM
*/
- mmio_resource(dev, index++, (0xa0000 >> 10), (0xc0000 - 0xa0000) >> 10);
- reserved_ram_resource(dev, index++, (0xc0000 >> 10), (0x100000 - 0xc0000) >> 10);
+ mmio_resource_kb(dev, index++, (0xa0000 >> 10), (0xc0000 - 0xa0000) >> 10);
+ reserved_ram_resource_kb(dev, index++, (0xc0000 >> 10), (0x100000 - 0xc0000) >> 10);
/*
* Reserve local APIC
*/
base_k = RES_IN_KiB(LAPIC_DEFAULT_BASE);
size_k = RES_IN_KiB(0x00100000);
- mmio_resource(dev, index++, base_k, size_k);
+ mmio_resource_kb(dev, index++, base_k, size_k);
}
static void nc_generate_ssdt(const struct device *dev)
diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c
index c058850c5e..0f762fcb8c 100644
--- a/src/soc/intel/braswell/southcluster.c
+++ b/src/soc/intel/braswell/southcluster.c
@@ -48,7 +48,7 @@ static void sc_set_serial_irqs_mode(struct device *dev, enum serirq_mode mode)
static inline void add_mmio_resource(struct device *dev, int i, unsigned long addr,
unsigned long size)
{
- mmio_resource(dev, i, addr >> 10, size >> 10);
+ mmio_resource_kb(dev, i, addr >> 10, size >> 10);
}
static void sc_add_mmio_resources(struct device *dev)
diff --git a/src/soc/intel/broadwell/northbridge.c b/src/soc/intel/broadwell/northbridge.c
index a29a4f41ca..4825b8881f 100644
--- a/src/soc/intel/broadwell/northbridge.c
+++ b/src/soc/intel/broadwell/northbridge.c
@@ -317,13 +317,13 @@ static void mc_add_dram_resources(struct device *dev, int *resource_cnt)
/* 0 - > 0xa0000 */
base_k = 0;
size_k = (0xa0000 >> 10) - base_k;
- ram_resource(dev, index++, base_k, size_k);
+ ram_resource_kb(dev, index++, base_k, size_k);
/* 0xc0000 -> TSEG - DPR */
base_k = 0xc0000 >> 10;
size_k = (unsigned long)(mc_values[TSEG_REG] >> 10) - base_k;
size_k -= dpr_size >> 10;
- ram_resource(dev, index++, base_k, size_k);
+ ram_resource_kb(dev, index++, base_k, size_k);
/* TSEG - DPR -> BGSM */
resource = new_resource(dev, index++);
@@ -346,15 +346,15 @@ static void mc_add_dram_resources(struct device *dev, int *resource_cnt)
touud_k = mc_values[TOUUD_REG] >> 10;
size_k = touud_k - base_k;
if (touud_k > base_k)
- ram_resource(dev, index++, base_k, size_k);
+ ram_resource_kb(dev, index++, base_k, size_k);
/* Reserve everything between A segment and 1MB:
*
* 0xa0000 - 0xbffff: legacy VGA
* 0xc0000 - 0xfffff: RAM
*/
- mmio_resource(dev, index++, (0xa0000 >> 10), (0xc0000 - 0xa0000) >> 10);
- reserved_ram_resource(dev, index++, (0xc0000 >> 10),
+ mmio_resource_kb(dev, index++, (0xa0000 >> 10), (0xc0000 - 0xa0000) >> 10);
+ reserved_ram_resource_kb(dev, index++, (0xc0000 >> 10),
(0x100000 - 0xc0000) >> 10);
*resource_cnt = index;
@@ -374,9 +374,9 @@ static void systemagent_read_resources(struct device *dev)
/* Add VT-d MMIO resources if capable */
if (vtd_capable) {
- mmio_resource(dev, index++, GFXVT_BASE_ADDRESS / KiB,
+ mmio_resource_kb(dev, index++, GFXVT_BASE_ADDRESS / KiB,
GFXVT_BASE_SIZE / KiB);
- mmio_resource(dev, index++, VTVC0_BASE_ADDRESS / KiB,
+ mmio_resource_kb(dev, index++, VTVC0_BASE_ADDRESS / KiB,
VTVC0_BASE_SIZE / KiB);
}
diff --git a/src/soc/intel/cannonlake/pmc.c b/src/soc/intel/cannonlake/pmc.c
index b0febd072b..f0a32b9379 100644
--- a/src/soc/intel/cannonlake/pmc.c
+++ b/src/soc/intel/cannonlake/pmc.c
@@ -74,7 +74,7 @@ static void soc_pmc_read_resources(struct device *dev)
struct resource *res;
/* Add the fixed MMIO resource */
- mmio_resource(dev, 0, PCH_PWRM_BASE_ADDRESS / KiB, PCH_PWRM_BASE_SIZE / KiB);
+ mmio_resource_kb(dev, 0, PCH_PWRM_BASE_ADDRESS / KiB, PCH_PWRM_BASE_SIZE / KiB);
/* Add the fixed I/O resource */
res = new_resource(dev, 1);
diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c
index ed61c10beb..8dc173cf05 100644
--- a/src/soc/intel/common/block/fast_spi/fast_spi.c
+++ b/src/soc/intel/common/block/fast_spi/fast_spi.c
@@ -529,7 +529,7 @@ static void fast_spi_read_resources(struct device *dev)
pci_dev_read_resources(dev);
/* Add SPI flash MMIO window as a reserved resource. */
- mmio_resource(dev, 0, FLASH_BASE_ADDR / KiB, FLASH_MMIO_SIZE / KiB);
+ mmio_resource_kb(dev, 0, FLASH_BASE_ADDR / KiB, FLASH_MMIO_SIZE / KiB);
}
static struct device_operations fast_spi_dev_ops = {
diff --git a/src/soc/intel/common/block/p2sb/ioe_p2sb.c b/src/soc/intel/common/block/p2sb/ioe_p2sb.c
index 85d8bc19cc..e806417014 100644
--- a/src/soc/intel/common/block/p2sb/ioe_p2sb.c
+++ b/src/soc/intel/common/block/p2sb/ioe_p2sb.c
@@ -28,7 +28,7 @@ void ioe_p2sb_enable_bar(void)
static void read_resources(struct device *dev)
{
- mmio_resource(dev, 0, IOE_P2SB_BAR / KiB, IOE_P2SB_SIZE / KiB);
+ mmio_resource_kb(dev, 0, IOE_P2SB_BAR / KiB, IOE_P2SB_SIZE / KiB);
}
struct device_operations device_ops = {
diff --git a/src/soc/intel/common/block/p2sb/p2sb.c b/src/soc/intel/common/block/p2sb/p2sb.c
index c23947c473..910f01d01c 100644
--- a/src/soc/intel/common/block/p2sb/p2sb.c
+++ b/src/soc/intel/common/block/p2sb/p2sb.c
@@ -128,7 +128,7 @@ static void read_resources(struct device *dev)
* The following code makes sure that it doesn't change if the device
* is visible and the resource allocator is being run.
*/
- mmio_resource(dev, PCI_BASE_ADDRESS_0, P2SB_BAR / KiB, P2SB_SIZE / KiB);
+ mmio_resource_kb(dev, PCI_BASE_ADDRESS_0, P2SB_BAR / KiB, P2SB_SIZE / KiB);
}
static const struct device_operations device_ops = {
diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c
index 19a413f9d1..1d88d6a4b2 100644
--- a/src/soc/intel/common/block/systemagent/systemagent.c
+++ b/src/soc/intel/common/block/systemagent/systemagent.c
@@ -108,7 +108,7 @@ void sa_add_fixed_mmio_resources(struct device *dev, int *resource_cnt,
sa_fixed_resources[i].description, sa_fixed_resources[i].base,
sa_fixed_resources[i].size);
- mmio_resource(dev, index++, base / KiB, size / KiB);
+ mmio_resource_kb(dev, index++, base / KiB, size / KiB);
}
*resource_cnt = index;
@@ -197,26 +197,26 @@ static void sa_add_dram_resources(struct device *dev, int *resource_count)
/* 0 - > 0xa0000 */
base_k = 0;
size_k = (0xa0000 / KiB) - base_k;
- ram_resource(dev, index++, base_k, size_k);
+ ram_resource_kb(dev, index++, base_k, size_k);
/* 0xc0000 -> top_of_ram */
base_k = 0xc0000 / KiB;
size_k = (top_of_ram / KiB) - base_k;
- ram_resource(dev, index++, base_k, size_k);
+ ram_resource_kb(dev, index++, base_k, size_k);
sa_get_mem_map(dev, &sa_map_values[0]);
/* top_of_ram -> TOLUD */
base_k = top_of_ram;
size_k = sa_map_values[SA_TOLUD_REG] - base_k;
- mmio_resource(dev, index++, base_k / KiB, size_k / KiB);
+ mmio_resource_kb(dev, index++, base_k / KiB, size_k / KiB);
/* 4GiB -> TOUUD */
base_k = 4 * (GiB / KiB); /* 4GiB */
touud_k = sa_map_values[SA_TOUUD_REG] / KiB;
size_k = touud_k - base_k;
if (touud_k > base_k)
- ram_resource(dev, index++, base_k, size_k);
+ ram_resource_kb(dev, index++, base_k, size_k);
/*
* Reserve everything between A segment and 1MB:
@@ -224,8 +224,8 @@ static void sa_add_dram_resources(struct device *dev, int *resource_count)
* 0xa0000 - 0xbffff: legacy VGA
* 0xc0000 - 0xfffff: RAM
*/
- mmio_resource(dev, index++, 0xa0000 / KiB, (0xc0000 - 0xa0000) / KiB);
- reserved_ram_resource(dev, index++, 0xc0000 / KiB,
+ mmio_resource_kb(dev, index++, 0xa0000 / KiB, (0xc0000 - 0xa0000) / KiB);
+ reserved_ram_resource_kb(dev, index++, 0xc0000 / KiB,
(1*MiB - 0xc0000) / KiB);
*resource_count = index;
@@ -249,7 +249,7 @@ static void imr_resource(struct device *dev, int idx, uint32_t base,
* out of MTRRs. Memory reserved by IMRs is not usable for host
* so mark it reserved.
*/
- reserved_ram_resource(dev, idx, base_k, size_k);
+ reserved_ram_resource_kb(dev, idx, base_k, size_k);
}
/*
@@ -295,7 +295,7 @@ static void systemagent_read_resources(struct device *dev)
/* Reserve the window used for extended BIOS decoding. */
if (CONFIG(FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW))
- mmio_resource(dev, index++, CONFIG_EXT_BIOS_WIN_BASE / KiB,
+ mmio_resource_kb(dev, index++, CONFIG_EXT_BIOS_WIN_BASE / KiB,
CONFIG_EXT_BIOS_WIN_SIZE / KiB);
}
diff --git a/src/soc/intel/denverton_ns/systemagent.c b/src/soc/intel/denverton_ns/systemagent.c
index 16b73281b4..774ab2d5d9 100644
--- a/src/soc/intel/denverton_ns/systemagent.c
+++ b/src/soc/intel/denverton_ns/systemagent.c
@@ -238,12 +238,12 @@ static void mc_add_dram_resources(struct device *dev)
/* 0 - > 0xa0000 */
base_k = 0;
size_k = (0xa0000 >> 10) - base_k;
- ram_resource(dev, index++, base_k, size_k);
+ ram_resource_kb(dev, index++, base_k, size_k);
/* 0x100000 -> top_of_ram */
base_k = 0x100000 >> 10;
size_k = (top_of_ram >> 10) - base_k;
- ram_resource(dev, index++, base_k, size_k);
+ ram_resource_kb(dev, index++, base_k, size_k);
/* top_of_ram -> TSEG */
resource = new_resource(dev, index++);
@@ -269,7 +269,7 @@ static void mc_add_dram_resources(struct device *dev)
touud_k = mc_values[TOUUD_REG] >> 10;
size_k = touud_k - base_k;
if (touud_k > base_k)
- ram_resource(dev, index++, base_k, size_k);
+ ram_resource_kb(dev, index++, base_k, size_k);
/*
* Reserve everything between A segment and 1MB:
@@ -277,8 +277,8 @@ static void mc_add_dram_resources(struct device *dev)
* 0xa0000 - 0xbffff: legacy VGA
* 0xc0000 - 0xfffff: reserved RAM
*/
- mmio_resource(dev, index++, (0xa0000 >> 10), (0xc0000 - 0xa0000) >> 10);
- reserved_ram_resource(dev, index++, (0xc0000 >> 10),
+ mmio_resource_kb(dev, index++, (0xa0000 >> 10), (0xc0000 - 0xa0000) >> 10);
+ reserved_ram_resource_kb(dev, index++, (0xc0000 >> 10),
(0x100000 - 0xc0000) >> 10);
}
diff --git a/src/soc/intel/elkhartlake/pmc.c b/src/soc/intel/elkhartlake/pmc.c
index cf736dd2ca..223e17070f 100644
--- a/src/soc/intel/elkhartlake/pmc.c
+++ b/src/soc/intel/elkhartlake/pmc.c
@@ -71,7 +71,7 @@ static void soc_pmc_read_resources(struct device *dev)
{
struct resource *res;
- mmio_resource(dev, 0, PCH_PWRM_BASE_ADDRESS / KiB, PCH_PWRM_BASE_SIZE / KiB);
+ mmio_resource_kb(dev, 0, PCH_PWRM_BASE_ADDRESS / KiB, PCH_PWRM_BASE_SIZE / KiB);
res = new_resource(dev, 1);
res->base = (resource_t)ACPI_BASE_ADDRESS;
diff --git a/src/soc/intel/jasperlake/pmc.c b/src/soc/intel/jasperlake/pmc.c
index 5ad692b73f..b6a17f3db8 100644
--- a/src/soc/intel/jasperlake/pmc.c
+++ b/src/soc/intel/jasperlake/pmc.c
@@ -71,7 +71,7 @@ static void soc_pmc_read_resources(struct device *dev)
{
struct resource *res;
- mmio_resource(dev, 0, PCH_PWRM_BASE_ADDRESS / KiB, PCH_PWRM_BASE_SIZE / KiB);
+ mmio_resource_kb(dev, 0, PCH_PWRM_BASE_ADDRESS / KiB, PCH_PWRM_BASE_SIZE / KiB);
res = new_resource(dev, 1);
res->base = (resource_t)ACPI_BASE_ADDRESS;
diff --git a/src/soc/intel/quark/northcluster.c b/src/soc/intel/quark/northcluster.c
index 5cb0c812d7..af4dd2449e 100644
--- a/src/soc/intel/quark/northcluster.c
+++ b/src/soc/intel/quark/northcluster.c
@@ -20,7 +20,7 @@ static void nc_read_resources(struct device *dev)
/* 0 -> 0xa0000 */
base_k = 0;
size_k = 0xa0000 - base_k;
- ram_resource(dev, index++, RES_IN_KIB(base_k), RES_IN_KIB(size_k));
+ ram_resource_kb(dev, index++, RES_IN_KIB(base_k), RES_IN_KIB(size_k));
/*
* Reserve everything between A segment and 1MB:
@@ -31,28 +31,28 @@ static void nc_read_resources(struct device *dev)
*/
base_k += size_k;
size_k = 0xc0000 - base_k;
- mmio_resource(dev, index++, RES_IN_KIB(base_k), RES_IN_KIB(size_k));
+ mmio_resource_kb(dev, index++, RES_IN_KIB(base_k), RES_IN_KIB(size_k));
base_k += size_k;
size_k = 0x100000 - base_k;
- reserved_ram_resource(dev, index++, RES_IN_KIB(base_k),
+ reserved_ram_resource_kb(dev, index++, RES_IN_KIB(base_k),
RES_IN_KIB(size_k));
/* 0x100000 -> cbmem_top - cacheable and usable */
base_k += size_k;
size_k = (unsigned long)cbmem_top() - base_k;
- ram_resource(dev, index++, RES_IN_KIB(base_k), RES_IN_KIB(size_k));
+ ram_resource_kb(dev, index++, RES_IN_KIB(base_k), RES_IN_KIB(size_k));
/* cbmem_top -> 0xc0000000 - reserved */
base_k += size_k;
size_k = 0xc0000000 - base_k;
- reserved_ram_resource(dev, index++, RES_IN_KIB(base_k),
+ reserved_ram_resource_kb(dev, index++, RES_IN_KIB(base_k),
RES_IN_KIB(size_k));
/* 0xc0000000 -> 4GiB is mmio. */
base_k += size_k;
size_k = 0x100000000ull - base_k;
- mmio_resource(dev, index++, RES_IN_KIB(base_k), RES_IN_KIB(size_k));
+ mmio_resource_kb(dev, index++, RES_IN_KIB(base_k), RES_IN_KIB(size_k));
}
static struct device_operations nc_ops = {
diff --git a/src/soc/intel/tigerlake/pmc.c b/src/soc/intel/tigerlake/pmc.c
index b8eb3078c4..31a9cc43cf 100644
--- a/src/soc/intel/tigerlake/pmc.c
+++ b/src/soc/intel/tigerlake/pmc.c
@@ -84,7 +84,7 @@ static void soc_pmc_read_resources(struct device *dev)
struct resource *res;
/* Add the fixed MMIO resource */
- mmio_resource(dev, 0, PCH_PWRM_BASE_ADDRESS / KiB, PCH_PWRM_BASE_SIZE / KiB);
+ mmio_resource_kb(dev, 0, PCH_PWRM_BASE_ADDRESS / KiB, PCH_PWRM_BASE_SIZE / KiB);
/* Add the fixed I/O resource */
res = new_resource(dev, 1);
diff --git a/src/soc/intel/xeon_sp/uncore.c b/src/soc/intel/xeon_sp/uncore.c
index e1931b1d3a..8e929155f7 100644
--- a/src/soc/intel/xeon_sp/uncore.c
+++ b/src/soc/intel/xeon_sp/uncore.c
@@ -184,19 +184,19 @@ static void mc_add_dram_resources(struct device *dev, int *res_count)
base_kb = 0;
size_kb = (0xa0000 >> 10);
LOG_MEM_RESOURCE("legacy_ram", dev, index, base_kb, size_kb);
- ram_resource(dev, index++, base_kb, size_kb);
+ ram_resource_kb(dev, index++, base_kb, size_kb);
/* 1MB -> top_of_ram i.e., cbmem_top */
base_kb = (0x100000 >> 10);
size_kb = ((uintptr_t)cbmem_top() - 1 * MiB) >> 10;
LOG_MEM_RESOURCE("low_ram", dev, index, base_kb, size_kb);
- ram_resource(dev, index++, base_kb, size_kb);
+ ram_resource_kb(dev, index++, base_kb, size_kb);
/* Mark TSEG/SMM region as reserved */
base_kb = (mc_values[TSEG_BASE_REG] >> 10);
size_kb = (mc_values[TSEG_LIMIT_REG] - mc_values[TSEG_BASE_REG] + 1) >> 10;
LOG_MEM_RESOURCE("mmio_tseg", dev, index, base_kb, size_kb);
- reserved_ram_resource(dev, index++, base_kb, size_kb);
+ reserved_ram_resource_kb(dev, index++, base_kb, size_kb);
/* Reserve and set up DPR */
configure_dpr(dev);
@@ -204,7 +204,7 @@ static void mc_add_dram_resources(struct device *dev, int *res_count)
if (dpr.size) {
uint64_t dpr_base_k = (dpr.top - dpr.size) << 10;
uint64_t dpr_size_k = dpr.size << 10;
- reserved_ram_resource(dev, index++, dpr_base_k, dpr_size_k);
+ reserved_ram_resource_kb(dev, index++, dpr_base_k, dpr_size_k);
LOG_MEM_RESOURCE("dpr", dev, index, dpr_base_k, dpr_size_k);
}
@@ -213,7 +213,7 @@ static void mc_add_dram_resources(struct device *dev, int *res_count)
base_kb = ((mc_values[TSEG_LIMIT_REG] + 1) >> 10);
size_kb = (mc_values[TOLM_REG] - mc_values[TSEG_LIMIT_REG]) >> 10;
LOG_MEM_RESOURCE("mmio_tolm", dev, index, base_kb, size_kb);
- reserved_ram_resource(dev, index++, base_kb, size_kb);
+ reserved_ram_resource_kb(dev, index++, base_kb, size_kb);
}
/* 4GiB -> TOHM */
@@ -221,7 +221,7 @@ static void mc_add_dram_resources(struct device *dev, int *res_count)
base_kb = (0x100000000 >> 10);
size_kb = (mc_values[TOHM_REG] - 0x100000000 + 1) >> 10;
LOG_MEM_RESOURCE("high_ram", dev, index, base_kb, size_kb);
- ram_resource(dev, index++, base_kb, size_kb);
+ ram_resource_kb(dev, index++, base_kb, size_kb);
}
/* add MMIO CFG resource */
@@ -253,12 +253,12 @@ static void mc_add_dram_resources(struct device *dev, int *res_count)
base_kb = VGA_BASE_ADDRESS >> 10;
size_kb = VGA_BASE_SIZE >> 10;
LOG_MEM_RESOURCE("legacy_mmio", dev, index, base_kb, size_kb);
- mmio_resource(dev, index++, base_kb, size_kb);
+ mmio_resource_kb(dev, index++, base_kb, size_kb);
base_kb = (0xc0000 >> 10);
size_kb = (0x100000 - 0xc0000) >> 10;
LOG_MEM_RESOURCE("legacy_write_protect", dev, index, base_kb, size_kb);
- reserved_ram_resource(dev, index++, base_kb, size_kb);
+ reserved_ram_resource_kb(dev, index++, base_kb, size_kb);
*res_count = index;
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-10 11:12:22 +0000