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-rw-r--r--src/soc/intel/skylake/chip.h4
-rw-r--r--src/soc/intel/skylake/gpio.c18
-rw-r--r--src/soc/intel/skylake/include/soc/gpio.h3
-rw-r--r--src/soc/intel/skylake/include/soc/pm.h1
-rw-r--r--src/soc/intel/skylake/pmc.c3
-rw-r--r--src/soc/intel/skylake/pmutil.c8
6 files changed, 0 insertions, 37 deletions
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index 873342ae47..9fe1ed2a4d 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -54,10 +54,6 @@ struct soc_intel_skylake_config {
uint8_t gpe0_dw1; /* GPE0_63_32 STS/EN */
uint8_t gpe0_dw2; /* GPE0_95_64 STS/EN */
- /* GPIO SMI configuration */
- uint32_t ec_smi_gpio;
- uint32_t alt_gp_smi_en;
-
/* Generic IO decode ranges */
uint32_t gen1_dec;
uint32_t gen2_dec;
diff --git a/src/soc/intel/skylake/gpio.c b/src/soc/intel/skylake/gpio.c
index 18638873f7..afd838f105 100644
--- a/src/soc/intel/skylake/gpio.c
+++ b/src/soc/intel/skylake/gpio.c
@@ -371,21 +371,3 @@ void gpio_enable_all_smi(void)
0xFFFFFFFF);
}
}
-
-void gpio_enable_groupsmi(gpio_t gpio_num, u32 mask)
-{
- u32 gpioindex = 0;
- u32 smien = 0;
-
- if (gpio_num > MAX_GPIO_NUMBER)
- return;
-
- gpioindex = (gpio_num / MAX_GPIO_PIN_PER_GROUP);
-
- pcr_read32(gpio_group_info[gpioindex].community,
- gpio_group_info[gpioindex].smienoffset, &smien);
- smien |= mask;
- /* Set all GPI SMI Enable bits by writing '1' */
- pcr_write32(gpio_group_info[gpioindex].community,
- gpio_group_info[gpioindex].smienoffset, smien);
-}
diff --git a/src/soc/intel/skylake/include/soc/gpio.h b/src/soc/intel/skylake/include/soc/gpio.h
index 321f04c5d3..1c462a7964 100644
--- a/src/soc/intel/skylake/include/soc/gpio.h
+++ b/src/soc/intel/skylake/include/soc/gpio.h
@@ -40,9 +40,6 @@ void gpio_get_smi_status(u32 status[GPIO_COMMUNITY_MAX]);
/* Enable GPIO SMI */
void gpio_enable_all_smi(void);
-/* Enable GPIO individual Group SMI */
-void gpio_enable_groupsmi(gpio_t gpio_num, u32 mask);
-
/*
* Set the GPIO groups for the GPE blocks. The gpe0_route is interpreted
* as the packed configuration for GPE0_DW[2:0]:
diff --git a/src/soc/intel/skylake/include/soc/pm.h b/src/soc/intel/skylake/include/soc/pm.h
index 9409ba2184..c0a165e8d9 100644
--- a/src/soc/intel/skylake/include/soc/pm.h
+++ b/src/soc/intel/skylake/include/soc/pm.h
@@ -176,7 +176,6 @@ void disable_smi(uint32_t mask);
/* ALT_GP_SMI */
uint32_t clear_alt_smi_status(void);
-void enable_alt_smi(int gpionum, u32 mask);
void reset_alt_smi_status(void);
/* TCO */
diff --git a/src/soc/intel/skylake/pmc.c b/src/soc/intel/skylake/pmc.c
index b6c35ebb4f..2704956580 100644
--- a/src/soc/intel/skylake/pmc.c
+++ b/src/soc/intel/skylake/pmc.c
@@ -227,9 +227,6 @@ static void pch_power_options(void)
/* Set up GPE configuration. */
pmc_gpe_init(config);
-
- /* SMI setup based on device tree configuration */
- enable_alt_smi(config->ec_smi_gpio, config->alt_gp_smi_en);
}
static void config_deep_sX(uint32_t offset, uint32_t mask, int sx, int enable)
diff --git a/src/soc/intel/skylake/pmutil.c b/src/soc/intel/skylake/pmutil.c
index e5d4a2ee19..8e54db40d0 100644
--- a/src/soc/intel/skylake/pmutil.c
+++ b/src/soc/intel/skylake/pmutil.c
@@ -258,14 +258,6 @@ u32 clear_alt_smi_status(void)
return print_alt_smi_status();
}
-/* Enable GPIO SMI events */
-void enable_alt_smi(int gpionum, u32 mask)
-{
- /*Set GPIO EN Status*/
- gpio_enable_groupsmi(gpionum, mask);
-}
-
-
/*
* TCO
*/