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-rw-r--r--src/soc/intel/xeon_sp/memmap.c2
-rw-r--r--src/soc/intel/xeon_sp/uncore.c6
2 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/xeon_sp/memmap.c b/src/soc/intel/xeon_sp/memmap.c
index 8fe21e8430..bf4c13e4d3 100644
--- a/src/soc/intel/xeon_sp/memmap.c
+++ b/src/soc/intel/xeon_sp/memmap.c
@@ -30,7 +30,7 @@ void smm_region(uintptr_t *start, size_t *size)
void fill_postcar_frame(struct postcar_frame *pcf)
{
- const uintptr_t top_of_ram = (uintptr_t)cbmem_top();
+ const uintptr_t top_of_ram = cbmem_top();
uintptr_t cbmem_base;
size_t cbmem_size;
diff --git a/src/soc/intel/xeon_sp/uncore.c b/src/soc/intel/xeon_sp/uncore.c
index 96451913fd..2e5023d04e 100644
--- a/src/soc/intel/xeon_sp/uncore.c
+++ b/src/soc/intel/xeon_sp/uncore.c
@@ -139,7 +139,7 @@ static void mc_report_map_entries(struct device *dev, uint64_t *values)
static void configure_dpr(struct device *dev)
{
- const uintptr_t cbmem_top_mb = ALIGN_UP((uintptr_t)cbmem_top(), MiB) / MiB;
+ const uintptr_t cbmem_top_mb = ALIGN_UP(cbmem_top(), MiB) / MiB;
union dpr_register dpr = { .raw = pci_read_config32(dev, VTD_LTDPR) };
/* The DPR lock bit has to be set sufficiently early. It looks like
@@ -245,7 +245,7 @@ static void mc_add_dram_resources(struct device *dev, int *res_count)
LOG_RESOURCE("low_ram", dev, res);
/* top_of_ram -> cbmem_top */
- res = ram_from_to(dev, index++, top_of_ram, (uintptr_t)cbmem_top());
+ res = ram_from_to(dev, index++, top_of_ram, cbmem_top());
LOG_RESOURCE("cbmem_ram", dev, res);
/* Mark TSEG/SMM region as reserved */
@@ -261,7 +261,7 @@ static void mc_add_dram_resources(struct device *dev, int *res_count)
* DPR has a 1M granularity so it's possible if cbmem_top is not 1M
* aligned that some memory does not get marked as assigned.
*/
- res = reserved_ram_from_to(dev, index++, (uintptr_t)cbmem_top(),
+ res = reserved_ram_from_to(dev, index++, cbmem_top(),
(dpr.top - dpr.size) * MiB);
LOG_RESOURCE("unused_dram", dev, res);