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Diffstat (limited to 'src/soc/intel/xeon_sp/cpx/romstage.c')
-rw-r--r--src/soc/intel/xeon_sp/cpx/romstage.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/romstage.c b/src/soc/intel/xeon_sp/cpx/romstage.c
new file mode 100644
index 0000000000..32ada9f4cb
--- /dev/null
+++ b/src/soc/intel/xeon_sp/cpx/romstage.c
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* This file is part of the coreboot project. */
+
+#include <arch/romstage.h>
+#include <fsp/api.h>
+#include "chip.h"
+
+void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
+{
+ FSP_M_CONFIG *m_cfg = &mupd->FspmConfig;
+
+ (void)m_cfg;
+}