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Diffstat (limited to 'src/soc/intel/xeon_sp/cpx/romstage.c')
-rw-r--r--src/soc/intel/xeon_sp/cpx/romstage.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/romstage.c b/src/soc/intel/xeon_sp/cpx/romstage.c
index cbaa006219..4b97ddc96d 100644
--- a/src/soc/intel/xeon_sp/cpx/romstage.c
+++ b/src/soc/intel/xeon_sp/cpx/romstage.c
@@ -33,7 +33,6 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
/* Bitmask for valid sockets supported by the board */
m_cfg->BoardTypeBitmask = 0x11111111;
- m_cfg->mmiolSize = 0x0;
m_cfg->mmiohBase = 0x2000;
/* default: 0x1 (enable), set to 0x2 (auto) */
@@ -65,9 +64,6 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
/* the wait time in units of 1000us for PBSP to check in */
m_cfg->WaitTimeForPSBP = 0x7530;
- m_cfg->OemHookPostTopologyDiscovery = 0xFFF7727B;
- m_cfg->OemGetResourceMapUpdate = 0xFFF7727C;
-
/* Needed to avoid FSP-M reset. The default value of 0x01 is for MinPlatform */
m_cfg->PchAdrEn = 0x02;