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-rw-r--r--src/soc/intel/xeon_sp/cpx/include/soc/acpi.h6
-rw-r--r--src/soc/intel/xeon_sp/cpx/include/soc/cpu.h3
2 files changed, 6 insertions, 3 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/include/soc/acpi.h b/src/soc/intel/xeon_sp/cpx/include/soc/acpi.h
index 2f923d47a1..6a76ef222b 100644
--- a/src/soc/intel/xeon_sp/cpx/include/soc/acpi.h
+++ b/src/soc/intel/xeon_sp/cpx/include/soc/acpi.h
@@ -11,6 +11,12 @@ typedef struct {
uint8_t buf[32];
} MEM_BLK;
+/* P-state configuration */
+#define PSS_MAX_ENTRIES 16
+#define PSS_RATIO_STEP 1
+#define PSS_LATENCY_TRANSITION 10
+#define PSS_LATENCY_BUSMASTER 10
+
unsigned long northbridge_write_acpi_tables(const struct device *device,
unsigned long current, struct acpi_rsdp *rsdp);
diff --git a/src/soc/intel/xeon_sp/cpx/include/soc/cpu.h b/src/soc/intel/xeon_sp/cpx/include/soc/cpu.h
index 3e740645ba..19f6e4c5d5 100644
--- a/src/soc/intel/xeon_sp/cpx/include/soc/cpu.h
+++ b/src/soc/intel/xeon_sp/cpx/include/soc/cpu.h
@@ -9,9 +9,6 @@
#define CPUID_COOPERLAKE_SP_A0 0x05065a
#define CPUID_COOPERLAKE_SP_A1 0x05065b
-/* CPU bus clock is fixed at 100MHz */
-#define CPU_BCLK 100
-
void cpx_init_cpus(struct device *dev);
msr_t read_msr_ppin(void);