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-rw-r--r--src/soc/intel/tigerlake/include/soc/tcss.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/include/soc/tcss.h b/src/soc/intel/tigerlake/include/soc/tcss.h
index 713528bdbb..014e3076e6 100644
--- a/src/soc/intel/tigerlake/include/soc/tcss.h
+++ b/src/soc/intel/tigerlake/include/soc/tcss.h
@@ -3,6 +3,10 @@
#ifndef _SOC_TCSS_H_
#define _SOC_TCSS_H_
+/* Thunderbolt firmware IMR status */
+#define IOM_CSME_IMR_TBT_STATUS 0x14
+#define TBT_VALID_AUTHENTICATION (1 << 30)
+
/* IOM aux bias control registers in REGBAR MMIO space */
#define IOM_AUX_BIAS_CTRL_PULLUP_OFFSET_0 0x1070
#define IOM_AUX_BIAS_CTRL_PULLUP_OFFSET(x) (IOM_AUX_BIAS_CTRL_PULLUP_OFFSET_0 + (x) * 4)