diff options
Diffstat (limited to 'src/soc/intel/tigerlake')
| -rw-r--r-- | src/soc/intel/tigerlake/pcie_rp.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/pcie_rp.c b/src/soc/intel/tigerlake/pcie_rp.c index a9a6c7f374..ceb85d8aed 100644 --- a/src/soc/intel/tigerlake/pcie_rp.c +++ b/src/soc/intel/tigerlake/pcie_rp.c @@ -4,6 +4,8 @@ #include <intelblocks/pcie_rp.h> #include <soc/pci_devs.h> +#define CPU_CPIE_VW_IDX_BASE 24 + static const struct pcie_rp_group pch_lp_rp_groups[] = { { .slot = PCH_DEV_SLOT_PCIE, .count = 8 }, { .slot = PCH_DEV_SLOT_PCIE_1, .count = 8 }, @@ -49,3 +51,22 @@ enum pcie_rp_type soc_get_pcie_rp_type(const struct device *dev) return PCIE_RP_UNKNOWN; } + +int soc_get_cpu_rp_vw_idx(const struct device *dev) +{ + if (dev->path.type != DEVICE_PATH_PCI) + return -1; + + switch (dev->path.pci.devfn) { + case SA_DEVFN_PEG1: + return CPU_CPIE_VW_IDX_BASE + 2; + case SA_DEVFN_PEG2: + return CPU_CPIE_VW_IDX_BASE + 1; + case SA_DEVFN_PEG3: + return CPU_CPIE_VW_IDX_BASE; + case SA_DEVFN_CPU_PCIE: + return CPU_CPIE_VW_IDX_BASE + 3; + default: + return -1; + } +} |