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Diffstat (limited to 'src/soc/intel/tigerlake')
-rw-r--r--src/soc/intel/tigerlake/chip.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index fb6cda0919..f752b5f415 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -271,9 +271,6 @@ struct soc_intel_tigerlake_config {
* Setting to 0 (default) disables Heci1 and hides the device from OS */
uint8_t HeciEnabled;
- /* Intel Speed Shift Technology */
- uint8_t speed_shift_enable;
-
/* Enable/Disable EIST. 1b:Enabled, 0b:Disabled */
uint8_t eist_enable;