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Diffstat (limited to 'src/soc/intel/tigerlake/include/soc/pmc.h')
-rw-r--r--src/soc/intel/tigerlake/include/soc/pmc.h43
1 files changed, 30 insertions, 13 deletions
diff --git a/src/soc/intel/tigerlake/include/soc/pmc.h b/src/soc/intel/tigerlake/include/soc/pmc.h
index 513eeb90e6..53076e5885 100644
--- a/src/soc/intel/tigerlake/include/soc/pmc.h
+++ b/src/soc/intel/tigerlake/include/soc/pmc.h
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2020 Intel Corporation.
+ * Copyright 2020 The coreboot project Authors
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -115,18 +115,35 @@
#define GPE0_DWX_MASK 0xf
#define GPE0_DW_SHIFT(x) (4*(x))
-#define PMC_GPP_B 0x0
-#define PMC_GPP_T 0x1
-#define PMC_GPP_A 0x2
-#define PMC_GPP_R 0x3
-#define PMC_GPD 0x4
-#define PMC_GPP_S 0x5
-#define PMC_GPP_H 0x6
-#define PMC_GPP_D 0x7
-#define PMC_GPP_U 0x8
-#define PMC_GPP_F 0xA
-#define PMC_GPP_C 0xB
-#define PMC_GPP_E 0xC
+#if CONFIG(SOC_INTEL_TIGERLAKE)
+
+ #define PMC_GPP_B 0x0
+ #define PMC_GPP_T 0x1
+ #define PMC_GPP_A 0x2
+ #define PMC_GPP_R 0x3
+ #define PMC_GPD 0x4
+ #define PMC_GPP_S 0x5
+ #define PMC_GPP_H 0x6
+ #define PMC_GPP_D 0x7
+ #define PMC_GPP_U 0x8
+ #define PMC_GPP_F 0xA
+ #define PMC_GPP_C 0xB
+ #define PMC_GPP_E 0xC
+
+#elif CONFIG(SOC_INTEL_JASPERLAKE)
+
+ #define PMC_GPP_A 0x0
+ #define PMC_GPP_B 0x1
+ #define PMC_GPP_F 0x2
+ #define PMC_GPD 0x3
+ #define PMC_GPP_R 0x4
+ #define PMC_GPP_S 0x6
+ #define PMC_GPP_D 0x7
+ #define PMC_GPP_C 0x8
+ #define PMC_GPP_H 0xA
+ #define PMC_GPP_E 0xF
+
+#endif
#define GBLRST_CAUSE0 0x1924
#define GBLRST_CAUSE0_THERMTRIP (1 << 5)