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Diffstat (limited to 'src/soc/intel/tigerlake/chip.h')
| -rw-r--r-- | src/soc/intel/tigerlake/chip.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h index 9fc70f8a46..5e010bda59 100644 --- a/src/soc/intel/tigerlake/chip.h +++ b/src/soc/intel/tigerlake/chip.h @@ -285,6 +285,18 @@ struct soc_intel_tigerlake_config { * This mode makes FSP detect Optane and NVME and set PCIe lane mode * accordingly */ uint8_t HybridStorageMode; + + /* + * Override CPU flex ratio value: + * CPU ratio value controls the maximum processor non-turbo ratio. + * Valid Range 0 to 63. + * In general descriptor provides option to set default cpu flex ratio. + * Default cpu flex ratio 0 ensures booting with non-turbo max frequency. + * That's the reason FSP skips cpu_ratio override if cpu_ratio is 0. + * Only override CPU flex ratio to not boot with non-turbo max. + */ + uint8_t cpu_ratio_override; + }; typedef struct soc_intel_tigerlake_config config_t; |