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-rw-r--r--src/soc/intel/tigerlake/chip.h21
1 files changed, 21 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index 746cfa2225..6e15d50486 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -25,6 +25,24 @@
#define MAX_HD_AUDIO_SNDW_LINKS 4
#define MAX_HD_AUDIO_SSP_LINKS 6
+/* Define config parameters for In-Band ECC (IBECC). */
+#define MAX_IBECC_REGIONS 8
+
+enum ibecc_mode {
+ IBECC_PER_REGION,
+ IBECC_NONE,
+ IBECC_ALL
+};
+
+struct ibecc_config {
+ bool enable;
+ bool parity_en;
+ enum ibecc_mode mode;
+ bool region_enable[MAX_IBECC_REGIONS];
+ uint16_t region_base[MAX_IBECC_REGIONS];
+ uint16_t region_mask[MAX_IBECC_REGIONS];
+};
+
/* The first two are for TGL-U */
enum soc_intel_tigerlake_power_limits {
POWER_LIMITS_U_2_CORE,
@@ -152,6 +170,9 @@ struct soc_intel_tigerlake_config {
/* TCC activation offset */
uint32_t tcc_offset;
+ /* In-Band ECC (IBECC) configuration */
+ struct ibecc_config ibecc;
+
/* System Agent dynamic frequency support. Only effects ULX/ULT CPUs.
* When enabled memory will be training at two different frequencies.
* 0:Disabled, 1:FixedPoint0, 2:FixedPoint1, 3:FixedPoint2,