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-rw-r--r--src/soc/intel/tigerlake/acpi/camera_clock_ctl.asl1
-rw-r--r--src/soc/intel/tigerlake/acpi/gpio.asl1
-rw-r--r--src/soc/intel/tigerlake/acpi/gpio_op.asl1
-rw-r--r--src/soc/intel/tigerlake/acpi/ipu.asl1
-rw-r--r--src/soc/intel/tigerlake/acpi/ish.asl1
-rw-r--r--src/soc/intel/tigerlake/acpi/pch_glan.asl3
-rw-r--r--src/soc/intel/tigerlake/acpi/pch_hda.asl1
-rw-r--r--src/soc/intel/tigerlake/acpi/pci_irqs.asl1
-rw-r--r--src/soc/intel/tigerlake/acpi/pci_irqs_jsl.asl1
-rw-r--r--src/soc/intel/tigerlake/acpi/pci_irqs_tgl.asl1
-rw-r--r--src/soc/intel/tigerlake/acpi/pcie.asl1
-rw-r--r--src/soc/intel/tigerlake/acpi/platform.asl1
-rw-r--r--src/soc/intel/tigerlake/acpi/pmc.asl1
-rw-r--r--src/soc/intel/tigerlake/acpi/scs.asl1
-rw-r--r--src/soc/intel/tigerlake/acpi/serialio.asl1
-rw-r--r--src/soc/intel/tigerlake/acpi/smbus.asl1
-rw-r--r--src/soc/intel/tigerlake/acpi/southbridge.asl1
-rw-r--r--src/soc/intel/tigerlake/acpi/xhci.asl1
-rw-r--r--src/soc/intel/tigerlake/acpi/xhci_jsl.asl1
-rw-r--r--src/soc/intel/tigerlake/acpi/xhci_tgl.asl1
20 files changed, 0 insertions, 22 deletions
diff --git a/src/soc/intel/tigerlake/acpi/camera_clock_ctl.asl b/src/soc/intel/tigerlake/acpi/camera_clock_ctl.asl
index c9da977c7d..4f08cd78bd 100644
--- a/src/soc/intel/tigerlake/acpi/camera_clock_ctl.asl
+++ b/src/soc/intel/tigerlake/acpi/camera_clock_ctl.asl
@@ -1,7 +1,6 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2020 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/src/soc/intel/tigerlake/acpi/gpio.asl b/src/soc/intel/tigerlake/acpi/gpio.asl
index 0378b52be3..9bf0c6032f 100644
--- a/src/soc/intel/tigerlake/acpi/gpio.asl
+++ b/src/soc/intel/tigerlake/acpi/gpio.asl
@@ -1,7 +1,6 @@
/*
* This file is part of the coreboot project.
*
- * Copyright 2020 The coreboot project Authors
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/src/soc/intel/tigerlake/acpi/gpio_op.asl b/src/soc/intel/tigerlake/acpi/gpio_op.asl
index a16ebf753d..4444c09a5b 100644
--- a/src/soc/intel/tigerlake/acpi/gpio_op.asl
+++ b/src/soc/intel/tigerlake/acpi/gpio_op.asl
@@ -1,7 +1,6 @@
/*
* This file is part of the coreboot project.
*
- * Copyright 2020 The coreboot project Authors
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/src/soc/intel/tigerlake/acpi/ipu.asl b/src/soc/intel/tigerlake/acpi/ipu.asl
index ed964a4165..5711644bcb 100644
--- a/src/soc/intel/tigerlake/acpi/ipu.asl
+++ b/src/soc/intel/tigerlake/acpi/ipu.asl
@@ -1,7 +1,6 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2020 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/src/soc/intel/tigerlake/acpi/ish.asl b/src/soc/intel/tigerlake/acpi/ish.asl
index 186a147f44..ee3f1a3fdf 100644
--- a/src/soc/intel/tigerlake/acpi/ish.asl
+++ b/src/soc/intel/tigerlake/acpi/ish.asl
@@ -1,7 +1,6 @@
/*
* This file is part of the coreboot project.
*
- * Copyright 2019 Google LLC.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/src/soc/intel/tigerlake/acpi/pch_glan.asl b/src/soc/intel/tigerlake/acpi/pch_glan.asl
index 260dd44962..2d9d960565 100644
--- a/src/soc/intel/tigerlake/acpi/pch_glan.asl
+++ b/src/soc/intel/tigerlake/acpi/pch_glan.asl
@@ -1,9 +1,6 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2007-2009 coresystems GmbH
- * Copyright (C) 2014 Google Inc.
- * Copyright (C) 2017-2108 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/src/soc/intel/tigerlake/acpi/pch_hda.asl b/src/soc/intel/tigerlake/acpi/pch_hda.asl
index 708d0b56f1..0d10d2deb5 100644
--- a/src/soc/intel/tigerlake/acpi/pch_hda.asl
+++ b/src/soc/intel/tigerlake/acpi/pch_hda.asl
@@ -1,7 +1,6 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2019 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/src/soc/intel/tigerlake/acpi/pci_irqs.asl b/src/soc/intel/tigerlake/acpi/pci_irqs.asl
index d3230b4aa9..7048c150f6 100644
--- a/src/soc/intel/tigerlake/acpi/pci_irqs.asl
+++ b/src/soc/intel/tigerlake/acpi/pci_irqs.asl
@@ -1,7 +1,6 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2020 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/src/soc/intel/tigerlake/acpi/pci_irqs_jsl.asl b/src/soc/intel/tigerlake/acpi/pci_irqs_jsl.asl
index 006a5de4a8..086282e733 100644
--- a/src/soc/intel/tigerlake/acpi/pci_irqs_jsl.asl
+++ b/src/soc/intel/tigerlake/acpi/pci_irqs_jsl.asl
@@ -1,7 +1,6 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2020 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/src/soc/intel/tigerlake/acpi/pci_irqs_tgl.asl b/src/soc/intel/tigerlake/acpi/pci_irqs_tgl.asl
index 8aadf8db6a..7f632ba32e 100644
--- a/src/soc/intel/tigerlake/acpi/pci_irqs_tgl.asl
+++ b/src/soc/intel/tigerlake/acpi/pci_irqs_tgl.asl
@@ -1,7 +1,6 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2020 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/src/soc/intel/tigerlake/acpi/pcie.asl b/src/soc/intel/tigerlake/acpi/pcie.asl
index c6cfbce57b..53ae316413 100644
--- a/src/soc/intel/tigerlake/acpi/pcie.asl
+++ b/src/soc/intel/tigerlake/acpi/pcie.asl
@@ -1,7 +1,6 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2019 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/src/soc/intel/tigerlake/acpi/platform.asl b/src/soc/intel/tigerlake/acpi/platform.asl
index dde9b13186..682a7b93d8 100644
--- a/src/soc/intel/tigerlake/acpi/platform.asl
+++ b/src/soc/intel/tigerlake/acpi/platform.asl
@@ -1,7 +1,6 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2019 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/src/soc/intel/tigerlake/acpi/pmc.asl b/src/soc/intel/tigerlake/acpi/pmc.asl
index 0d62edd926..6dd2d35354 100644
--- a/src/soc/intel/tigerlake/acpi/pmc.asl
+++ b/src/soc/intel/tigerlake/acpi/pmc.asl
@@ -1,7 +1,6 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2020 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/src/soc/intel/tigerlake/acpi/scs.asl b/src/soc/intel/tigerlake/acpi/scs.asl
index a9ff93c2ca..83da7e0f06 100644
--- a/src/soc/intel/tigerlake/acpi/scs.asl
+++ b/src/soc/intel/tigerlake/acpi/scs.asl
@@ -1,7 +1,6 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2019 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/src/soc/intel/tigerlake/acpi/serialio.asl b/src/soc/intel/tigerlake/acpi/serialio.asl
index 95759c2dd0..6fd135b437 100644
--- a/src/soc/intel/tigerlake/acpi/serialio.asl
+++ b/src/soc/intel/tigerlake/acpi/serialio.asl
@@ -1,7 +1,6 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2019 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/src/soc/intel/tigerlake/acpi/smbus.asl b/src/soc/intel/tigerlake/acpi/smbus.asl
index 8febe9deef..f273e3669d 100644
--- a/src/soc/intel/tigerlake/acpi/smbus.asl
+++ b/src/soc/intel/tigerlake/acpi/smbus.asl
@@ -1,7 +1,6 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2020 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/src/soc/intel/tigerlake/acpi/southbridge.asl b/src/soc/intel/tigerlake/acpi/southbridge.asl
index 1403eb4b13..adb16aa4ba 100644
--- a/src/soc/intel/tigerlake/acpi/southbridge.asl
+++ b/src/soc/intel/tigerlake/acpi/southbridge.asl
@@ -1,7 +1,6 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2019-2020 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/src/soc/intel/tigerlake/acpi/xhci.asl b/src/soc/intel/tigerlake/acpi/xhci.asl
index 9618cf3003..f147a2a83f 100644
--- a/src/soc/intel/tigerlake/acpi/xhci.asl
+++ b/src/soc/intel/tigerlake/acpi/xhci.asl
@@ -1,7 +1,6 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2020 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/src/soc/intel/tigerlake/acpi/xhci_jsl.asl b/src/soc/intel/tigerlake/acpi/xhci_jsl.asl
index fe17b0d1bf..41be89ace1 100644
--- a/src/soc/intel/tigerlake/acpi/xhci_jsl.asl
+++ b/src/soc/intel/tigerlake/acpi/xhci_jsl.asl
@@ -1,7 +1,6 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2020 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/src/soc/intel/tigerlake/acpi/xhci_tgl.asl b/src/soc/intel/tigerlake/acpi/xhci_tgl.asl
index 312cc5a88e..b97f52052b 100644
--- a/src/soc/intel/tigerlake/acpi/xhci_tgl.asl
+++ b/src/soc/intel/tigerlake/acpi/xhci_tgl.asl
@@ -1,7 +1,6 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2019 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by