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-rw-r--r--src/soc/intel/tigerlake/acpi/tcss.asl8
-rw-r--r--src/soc/intel/tigerlake/acpi/tcss_dma.asl3
2 files changed, 10 insertions, 1 deletions
diff --git a/src/soc/intel/tigerlake/acpi/tcss.asl b/src/soc/intel/tigerlake/acpi/tcss.asl
index 5af78edb8a..2ae7049ee1 100644
--- a/src/soc/intel/tigerlake/acpi/tcss.asl
+++ b/src/soc/intel/tigerlake/acpi/tcss.asl
@@ -567,6 +567,10 @@ Scope (\_SB.PCI0)
/* DMA0 is not in D3Cold now. */
\_SB.PCI0.TDM0.D3CE() /* Enable DMA RTD3 */
+ If (\_SB.PCI0.TDM0.IF30 != 1) {
+ Return
+ }
+
Printf("Push TBT RPs to D3Cold together")
If (\_SB.PCI0.TRP0.VDID != 0xFFFFFFFF) {
/* Put RP0 to D3 cold. */
@@ -622,6 +626,10 @@ Scope (\_SB.PCI0)
/* DMA1 is not in D3Cold now */
\_SB.PCI0.TDM1.D3CE() /* Enable DMA RTD3. */
+ If (\_SB.PCI0.TDM1.IF30 != 1) {
+ Return
+ }
+
Printf("Push TBT RPs to D3Cold together")
If (\_SB.PCI0.TRP2.VDID != 0xFFFFFFFF) {
/* Put RP2 to D3 cold. */
diff --git a/src/soc/intel/tigerlake/acpi/tcss_dma.asl b/src/soc/intel/tigerlake/acpi/tcss_dma.asl
index bbb0b6a1ad..dd6d1bb3ac 100644
--- a/src/soc/intel/tigerlake/acpi/tcss_dma.asl
+++ b/src/soc/intel/tigerlake/acpi/tcss_dma.asl
@@ -11,7 +11,8 @@ Field (DPME, AnyAcc, NoLock, Preserve)
, 6,
PMES, 1, /* 15, PME_STATUS */
Offset(0xC8), /* 0xC8, TBT NVM FW Revision */
- , 31,
+ , 30,
+ IF30, 1, /* ITBT FW Version Bit30 */
INFR, 1, /* TBT NVM FW Ready */
Offset(0xEC), /* 0xEC, TBT TO PCIE Register */
TB2P, 32, /* TBT to PCIe */