diff options
Diffstat (limited to 'src/soc/intel/tigerlake/acpi/southbridge.asl')
| -rw-r--r-- | src/soc/intel/tigerlake/acpi/southbridge.asl | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/soc/intel/tigerlake/acpi/southbridge.asl b/src/soc/intel/tigerlake/acpi/southbridge.asl index 8593d07326..9d25a735f5 100644 --- a/src/soc/intel/tigerlake/acpi/southbridge.asl +++ b/src/soc/intel/tigerlake/acpi/southbridge.asl @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2019 Intel Corp. + * Copyright (C) 2019-2020 Intel Corp. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -40,6 +40,9 @@ /* PCIE Ports */ #include "pcie.asl" +/* pmc 0:1f.2 */ +#include "pmc.asl" + /* Serial IO */ #include "serialio.asl" |