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-rw-r--r--src/soc/intel/skylake/cpu.c4
-rw-r--r--src/soc/intel/skylake/include/soc/msr.h7
2 files changed, 2 insertions, 9 deletions
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
index 7a66ed0e33..cf039d5845 100644
--- a/src/soc/intel/skylake/cpu.c
+++ b/src/soc/intel/skylake/cpu.c
@@ -357,10 +357,10 @@ static void set_energy_perf_bias(u8 policy)
return;
/* Energy Policy is bits 3:0 */
- msr = rdmsr(IA32_ENERGY_PERFORMANCE_BIAS);
+ msr = rdmsr(IA32_ENERGY_PERF_BIAS);
msr.lo &= ~0xf;
msr.lo |= policy & 0xf;
- wrmsr(IA32_ENERGY_PERFORMANCE_BIAS, msr);
+ wrmsr(IA32_ENERGY_PERF_BIAS, msr);
printk(BIOS_DEBUG, "cpu: energy policy set to %u\n", policy);
}
diff --git a/src/soc/intel/skylake/include/soc/msr.h b/src/soc/intel/skylake/include/soc/msr.h
index 780f94fdc9..6da9325d87 100644
--- a/src/soc/intel/skylake/include/soc/msr.h
+++ b/src/soc/intel/skylake/include/soc/msr.h
@@ -24,13 +24,6 @@
#define EMULATE_PM_TMR_EN (1 << 16)
#define EMULATE_DELAY_OFFSET_VALUE 20
#define EMULATE_DELAY_VALUE 0x13
-#define IA32_THERM_INTERRUPT 0x19b
-#define IA32_ENERGY_PERFORMANCE_BIAS 0x1b0
-#define ENERGY_POLICY_PERFORMANCE 0
-#define ENERGY_POLICY_NORMAL 6
-#define ENERGY_POLICY_POWERSAVE 15
-#define IA32_PACKAGE_THERM_INTERRUPT 0x1b2
-#define IA32_PLATFORM_DCA_CAP 0x1f8
#define MSR_LT_LOCK_MEMORY 0x2e7
#define MSR_UNCORE_PRMRR_PHYS_BASE 0x2f4
#define MSR_UNCORE_PRMRR_PHYS_MASK 0x2f5